R5F72115D160FPV datasheet(715/1228 Pages) RENESAS

715 / 1228 page

Section 15 Serial Communication Interface with FIFO (SCIF)

Rev. 2.00 May. 08, 2008 Page 691 of 1200

REJ09B0344-0200

Table 15.6 indicates the maximum bit rates in asynchronous mode when the baud rate generator is

used. Tables 15.7 and 15.8 list the maximum bit rates when the external clock input is used.

Note: * Make sure that the electrical characteristics of this LSI and that of a connected LSI are

satisfied.

Table 15.6

Maximum Bit Rates for Various Frequencies with Baud Rate Generator

(Asynchronous Mode)

Settings

φ (MHz)

Maximum Bit Rate (bits/s)

1000000

1125000

1250000

Table 15.7

Maximum Bit Rates with External Clock Input (Asynchronous Mode)

φ (MHz)

External Input Clock (MHz)

Maximum Bit Rate (bits/s)

8.0000

500000

9.0000

562500

10.0000

625000

Table 15.8

Maximum Bit Rates with External Clock Input

(Clocked Synchronous Mode, t

Scyc = 12tpcyc)

φ (MHz)

External Input Clock (MHz)

Maximum Bit Rate (bits/s)

2.6667

2666666.7

3.0000

3000000.0

3.3333

3333333.3

Note:

Confirm that these bit rates meet the electrical characteristics of this LSI and the remote

communication device.

R5F72115D160FPV Datasheet(PDF) 715 Page - Renesas Technology Corp

R5F72115D160FPV Datasheet(HTML) 715 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL