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R5F72115D160FPV Datasheet(PDF) 719 Page - Renesas Technology Corp |
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R5F72115D160FPV Datasheet(HTML) 719 Page - Renesas Technology Corp |
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719 / 1228 page ![]() Section 15 Serial Communication Interface with FIFO (SCIF) Rev. 2.00 May. 08, 2008 Page 695 of 1200 REJ09B0344-0200 15.3.11 Serial Port Register (SCSPTR) SCSPTR controls input/output and data of pins multiplexed to SCIF function. Bits 3 and 2 can control input/output data of SCK pin. Bits 1 and 0 can input data from RXD pin and output data to TXD pin, so they control break of serial transmitting/receiving. The CPU can always read and write to SCSPTR. SCSPTR is initialized to H'0050 by a power-on reset. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0000000000000000 R R R R R R R R R R R R R/W R/W R/W R/W Bit: Initial value: R/W: - - - - - - - - - - - - SCKIO SCKDT SPB2IO SPB2DT Bit Bit Name Initial Value R/W Description 15 to 4 — All 0 R Reserved These bits are always read as 0. The write value should always be 0. 3 SCKIO 0 R/W SCK Port Input/Output Indicates input or output of the serial port SCK pin. When the SCK pin is actually used as a port outputting the SCKDT bit value, the CKE[1:0] bits in SCSCR should be cleared to 0. 0: SCKDT bit value not output to SCK pin 1: SCKDT bit value output to SCK pin 2 SCKDT 0 R/W SCK Port Data Indicates the input/output data of the serial port SCK pin. Input/output is specified by the SCKIO bit. For output, the SCKDT bit value is output to the SCK pin. The SCK pin status is read from the SCKDT bit regardless of the SCKIO bit setting. However, SCK input/output must be set in the PFC. 0: Input/output data is low level 1: Input/output data is high level |
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