R5F72115D160FPV datasheet(720/1228 Pages) RENESAS

720 / 1228 page

Section 15 Serial Communication Interface with FIFO (SCIF)

Rev. 2.00 May. 08, 2008 Page 696 of 1200

REJ09B0344-0200

Bit

Bit Name

Initial

Value

R/W

Description

SPB2IO

R/W

Serial Port Break Input/Output

Indicates input or output of the serial port TXD pin.

When the TXD pin is actually used as a port outputting

the SPB2DT bit value, the TE bit in SCSCR should be

cleared to 0.

0: SPB2DT bit value not output to TXD pin

1: SPB2DT bit value output to TXD pin

SPB2DT

R/W

Serial Port Break Data

Indicates the input data of the RXD pin and the output

data of the TXD pin used as serial ports. Input/output is

specified by the SPB2IO bit. When the TXD pin is set to

output, the SPB2DT bit value is output to the TXD pin.

The RXD pin status is read from the SPB2DT bit

regardless of the SPB2IO bit setting. However, RXD

input and TXD output must be set in the PFC.

0: Input/output data is low level

1: Input/output data is high level

15.3.12

Line Status Register (SCLSR)

The CPU can always read or write to SCLSR, but cannot write 1 to the ORER flag. This flag can

be cleared to 0 only if it has first been read (after being set to 1).

SCLSR is initialized to H'0000 by a power-on reset.

0000000000000000

R/(W)*

Bit:

Initial value:

R/W:

Note:

Only 0 can be written to clear the flag after 1 is read.

ORER

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