R5F72115D160FPV datasheet(928/1228 Pages) RENESAS

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Section 21 Flash Memory

Rev. 2.00 May. 08, 2008 Page 904 of 1200

REJ09B0344-0200

(6)

Flash Transfer Destination Address Register (FTDAR)

FTDAR specifies the on-chip RAM address to which the on-chip program is downloaded. Make

settings for FTDAR before writing 1 to the SCO bit in FCCS. The initial value is H'00 which

points to the start address (H'FFF81000) in on-chip RAM.

Bit:

Initial value:

R/W:

7654321

00000000

R/W

TDER

TDA[6:0]

Bit

Name

Initial

Value R/W

Description

TDER

R/W

Transfer Destination Address Setting Error

This bit is set to 1 when there is an error in the download start

address set by bits 6 to 0 (TDA6 to TDA0). Whether the address

setting is erroneous or not is tested by checking whether the

setting of TDA6 to TDA0 is in the range of H'00 to H'05 after

setting the SCO bit in FCCS to 1 and performing download.

Before setting the SCO bit to 1 be sure to set the FTDAR value

between H'00 to H'05 as well as clearing this bit to 0.

0: Setting of TDA6 to TDA0 is normal

1: Setting of TDER and TDA6 to TDA0 is H'06 to H'FF and

download has been aborted

6 to 0 TDA[6:0] All 0

R/W

Transfer Destination Address

These bits specify the download start address. A value from

H'00 to H'05 can be set to specify the download start address in

on-chip RAM in 2-kbyte units.

A value from H'06 to H'7F cannot be set. If such a value is set,

the TDER bit (bit 7) in this register is set to 1 to prevent

download from being executed.

H'00: Download start address is set to H'FFF81000

H'01: Download start address is set to H'FFF81800

H'02: Download start address is set to H'FFF82000

H'03: Download start address is set to H'FFF82800

H'04: Download start address is set to H'FFF83000

H'05: Download start address is set to H'FFF83800

H'06 to H'7F: Setting prohibited. If this value is set, the TDER bit

(bit 7) is set to 1 to abort the download processing.

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