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R5F72115D160FPV Datasheet(PDF) 924 Page - Renesas Technology Corp |
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R5F72115D160FPV Datasheet(HTML) 924 Page - Renesas Technology Corp |
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924 / 1228 page ![]() Section 21 Flash Memory Rev. 2.00 May. 08, 2008 Page 900 of 1200 REJ09B0344-0200 Bit Bit Name Initial Value R/W Description 0 SCO 0 (R)/W Source Program Copy Operation Requests the on-chip programming/erasing program to be downloaded to the on-chip RAM. When this bit is set to 1, the on-chip program which is selected by FPCS/FECS is automatically downloaded in the on-chip RAM area specified by FTDAR. In order to set this bit to 1, H'A5 must be written to FKEY and this operation must be in the on-chip RAM. Thirty-two NOP instructions must be executed immediately after setting this bit to 1. For interrupts during download, see section 21.7.2, Interrupts during Programming/Erasing. For the download time, see section 21.7.3, Other Notes. Since this bit is cleared to 0 when download is completed, this bit cannot be read as 1. Download by setting the SCO bit to 1 requires a special interrupt processing that performs bank switching to the on-chip program storage area. Therefore, before issuing a download request (SCO = 1), set VBR to H'80000000. Otherwise, the CPU gets out of control. Once download end is confirmed, VBR can be changed to any other value. The mode in which the FWE pin is high must be used when using the SCO function. 0: Download of the on-chip programming/erasing program to the on-chip RAM is not executed. [Clearing condition] When download is completed 1: Request that the on-chip programming/erasing program is downloaded to the on-chip RAM is generated [Setting conditions] When all of the following conditions are satisfied and 1 is written to this bit • FKEY is written to H'A5 • During execution in the on-chip RAM |
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