R5F72115D160FPV datasheet(934/1228 Pages) RENESAS

934 / 1228 page

Section 21 Flash Memory

Rev. 2.00 May. 08, 2008 Page 910 of 1200

REJ09B0344-0200

Bit

Bit Name

Initial

Value

R/W

Description

31 to 0 UA31 to

UA0

Undefined

R/W

User Branch Destination Address

When the user branch is not required, address 0

(H'00000000) must be set.

The user branch destination must be an area other than

the flash memory, an area other than the RAM area in

which on-chip program has been transferred, or the

external bus space.

Note that the CPU must not branch to an area without

the execution code and get out of control. The on-chip

program download area and stack area must not be

overwritten. If CPU runaway occurs or the download

area or stack area is overwritten, the value of flash

memory cannot be guaranteed.

The download of the on-chip program, initialization,

initiation of the programming/erasing program must not

be executed in the processing of the user branch

destination. Programming or erasing cannot be

guaranteed when returning from the user branch

destination. The program data which has already been

prepared must not be programmed.

Store general registers R8 to R15. General registers R0

to R7 are available without storing them.

Moreover, the programming/erasing interface registers

must not be written to in the processing of the user

branch destination.

After the processing of the user branch has ended, the

programming/erasing program must be returned to by

using the RTS instruction.

For the execution intervals of the user branch

processing, see note 2 (User branch processing

intervals) in section 21.7.3, Other Notes.

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