H8SLASH3021 datasheet(405/712 Pages) RENESAS

405 / 712 page

11. Serial Communication Interface

Rev.2.00 Mar. 22, 2007 Page 381 of 684

REJ09B0352-0200

In transmitting serial data, the SCI operates as follows.

• The SCI monitors the TDRE flag in SSR. When the TDRE flag is cleared to 0 the SCI

recognizes that TDR contains new data, and loads this data from TDR into TSR.

• After loading the data from TDR into TSR, the SCI sets the TDRE flag to 1 and starts

transmitting. If the TIE bit is set to 1 in SCR, the SCI requests a transmit-data-empty interrupt

(TXI) at this time.

If clock output is selected, the SCI outputs eight serial clock pulses. If an external clock source

is selected, the SCI outputs data in synchronization with the input clock. Data is output from

the TxD pin in order from LSB (bit 0) to MSB (bit 7).

• The SCI checks the TDRE flag when it outputs the MSB (bit 7). If the TDRE flag is 0, the SCI

loads data from TDR into TSR and begins serial transmission of the next frame. If the TDRE

flag is 1, the SCI sets the TEND flag to 1 in SSR, and after transmitting the MSB, holds the

TxD pin in the MSB state. If the TEIE bit in SCR is set to 1, a transmit-end interrupt (TEI) is

requested at this time.

• After the end of serial transmission, the SCK pin is held in a constant state.

H8/3021 Datasheet(PDF) 405 Page - Renesas Technology Corp