H8SLASH3021 datasheet(479/712 Pages) RENESAS

479 / 712 page

15. ROM

Rev.2.00 Mar. 22, 2007 Page 455 of 684

REJ09B0352-0200

15.5

15.5.1

Flash Memory Control Register 1 (FLMCR1)

FLMCR1 is an 8-bit register used for flash memory operating mode control. Program-verify mode

or erase-verify mode is entered by setting SWE bit to 1 when FWE = 1, then setting the PV or EV

bit. Program mode is entered by setting SWE1 bit to 1 when FWE = 1, then setting the PSU bit,

and finally setting the P bit. Erase mode is entered by setting SWE bit to 1 when FWE = 1, then

setting the ESU bit, and finally setting the E bit. FLMCR1 is initialized by a power-on reset, and

in hardware standby mode and software standby mode. Its initial value is H'80 when a high level

is input to the FWE pin, and H'00 when a low level is input. When on-chip flash memory is

disabled, a read will return H'00, and writes are invalid.

Writes are enabled only in the following cases: Writes to bit SWE of FLMCR1 enabled when

FWE = 1, to bits ESU, PSU, EV, and PV when FWE = 1 and SWE = 1, to bit E when FWE = 1,

SWE = 1 and ESU = 1, and to bit P when FWE = 1, SWE = 1, and PSU = 1.

Notes: 1. To prevent erroneous programming or erasing, the setting of individual bits in this

2. Transitions are made to program mode, erase mode, program-verify mode, and erase-

verify mode according to the settings in this register. When reading flash memory as

normal on-chip ROM, bits 6 to 0 in this register must be cleared.

Bit:

FWE

SWE

ESU

PSU

Initial value:

—*

R/W:

R/W

Note:

Set according to the state of the FWE pin.

Bit 7—Flash Write Enable Bit (FWE): Sets hardware protection against flash memory

programming/erasing.

Bit 7

FWE

Description

When a low level is input to the FWE pin (hardware-protected state)

When a high level is input to the FWE pin

H8/3021 Datasheet(PDF) 479 Page - Renesas Technology Corp