H8SLASH3021 datasheet(620/712 Pages) RENESAS

620 / 712 page

Appendix B. Internal I/O Register Field

Rev.2.00 Mar. 22, 2007 Page 596 of 684

REJ09B0352-0200

FLMCR1—Flash Memory Control Register 1

H'40

Flash memory

Bit

Initial value

Read/Write

—*

FWE

R/W

SWE

R/W

ESU

R/W

PSU

R/W

Program mode cleared (Initial value)

Transition to program mode

[Setting condition]

When FWE = 1, SWE = 1, and PSU = 1

Program mode

Erase mode cleared (Initial value)

Transition to erase mode

[Setting condition]

When FWE = 1, SWE = 1, and ESU = 1

Erase mode

Program-verify mode cleared (Initial value)

Transition to program-verify mode

[Setting condition]

When FWE = 1 and SWE = 1

Program-verify mode

Erase-verify mode cleared (Initial value)

Transition to erase-verify mode

[Setting condition]

When FWE = 1 and SWE = 1

Erase-verify mode

Program setup cleared (Initial value)

Program setup

[Setting condition]

When FWE = 1 and SWE = 1

Program setup

Erase setup cleared (Initial value)

Erase setup

[Setting condition]

When FWE = 1 and SWE = 1

Erase setup

Program/erase disabled (Initial value)

Program/erase enabled

[Setting condition]

When FWE = 1

Software write enable bit

When a low level is input to the FWE pin (hardware protection state)

When a high level is input to the FWE pin

Flash write enable bit

Notes: This register is used only in the flash memory versions.

Reading the corresponding address in a mask ROM version will always return

1s, and writes to this address are disabled.

* Set according to the state of the FWE pin.

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