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H8/3021 Datasheet(PDF) 623 Page - Renesas Technology Corp |
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H8/3021 Datasheet(HTML) 623 Page - Renesas Technology Corp |
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623 / 712 page ![]() Appendix B. Internal I/O Register Field Rev.2.00 Mar. 22, 2007 Page 599 of 684 REJ09B0352-0200 RAMER—RAM Emulation Register H'47 Flash Memory Bit 3 Bit 2 Bit 1 RAMS RAM2 RAM1 RAM Area 0 1 * 0 1 Bit 0 RAM0 * 0 1 0 1 0 1 0 1 * 0 1 0 1 H'FFFFE000 to H'FFFFEFFF H'00000000 to H'00000FFF H'00001000 to H'00001FFF H'00002000 to H'00002FFF H'00003000 to H'00003FFF H'00004000 to H'00004FFF H'00005000 to H'00005FFF H'00006000 to H'00006FFF H'00007000 to H'00007FFF RAM select, RAM2, RAM1, RAM0 Note: *: Don’t care. This register is used only in the flash memory versions. Reading the corresponding address in a mask ROM version will always return 1s, and writes to this address are disabled. Bit 7 — RAMS 65 4 3 2 1 0 ——— RAM2 RAM1 RAM0 1 R 1 R 1 R 1 R 0 R/W 0 R/W 0 R/W 0 R/W Initial value R/W |
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