H8SLASH3021 datasheet(209/712 Pages) RENESAS

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8. 16-Bit Integrated Timer Unit (ITU)

Rev.2.00 Mar. 22, 2007 Page 185 of 684

REJ09B0352-0200

Section 8 16-Bit Integrated Timer Unit (ITU)

8.1

Overview

The H8/3022 Group has a built-in 16-bit integrated timer unit (ITU) with five 16-bit timer

channels.

8.1.1

Features

ITU features are listed below.

• Capability to process up to 12 pulse outputs or 10 pulse inputs

• Ten general registers (GRs, two per channel) with independently-assignable output compare or

input capture functions

• Selection of eight counter clock sources for each channel:

Internal clocks:

φ, φ/2, φ/4, φ/8

External clocks: TCLKA, TCLKB, TCLKC, TCLKD

• Five operating modes selectable in all channels:

⎯ Waveform output by compare match

Selection of 0 output, 1 output, or toggle output (only 0 or 1 output in channel 2)

⎯ Input capture function

Rising edge, falling edge, or both edges (selectable)

⎯ Counter clearing function

Counters can be cleared by compare match or input capture

⎯ Synchronization

Two or more timer counters (TCNTs) can be preset simultaneously, or cleared

simultaneously by compare match or input capture. Counter synchronization enables

synchronous register input and output.

⎯ PWM mode

PWM output can be provided with an arbitrary duty cycle. With synchronization, up to

five-phase PWM output is possible

• Phase counting mode selectable in channel 2

Two-phase encoder output can be counted automatically.

• Three additional modes selectable in channels 3 and 4

⎯ Reset-synchronized PWM mode

If channels 3 and 4 are combined, three-phase PWM output is possible with three pairs of

complementary waveforms.

H8/3021 Datasheet(PDF) 209 Page - Renesas Technology Corp