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H8/3021 Datasheet(PDF) 292 Page - Renesas Technology Corp |
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H8/3021 Datasheet(HTML) 292 Page - Renesas Technology Corp |
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292 / 712 page ![]() 8. 16-Bit Integrated Timer Unit (ITU) Rev.2.00 Mar. 22, 2007 Page 268 of 684 REJ09B0352-0200 Timing of Setting of IMFA and IMFB by Input Capture: IMFA and IMFB are set to 1 by an input capture signal. The TCNT contents are simultaneously transferred to the corresponding general register. Figure 8.58 shows the timing. Input capture signal N N φ IMF TCNT GR IMI Figure 8.58 Timing of Setting of IMFA and IMFB by Input Capture Timing of Setting of Overflow Flag (OVF): OVF is set to 1 when TCNT overflows from H'FFFF to H'0000 or underflows from H'0000 to H'FFFF. Figure 8.59 shows the timing. |
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