7733 datasheet(16/940 Pages) RENESAS

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7735 Group User’s Manual

Table of contents

PART 2 7735 Group

CHAPTER 1. OVERVIEW

1.1 Performance overview ........................................................................................................... 1-2

1.2 Pin configuration .................................................................................................................... 1-3

1.3 Pin description ....................................................................................................................... 1-4

1.3.1 Examples of handling unused pins .............................................................................. 1-6

1.4 Block diagram .....................................................................................................

1-11 in part 1

CHAPTER 2. CENTRAL PROCESSING UNIT (CPU)

2.1 Central processing unit ...................................................................................... 2-2 in part 1

2.2 Bus interface unit .................................................................................................................. 2-2

2.3 Accessible area ...................................................................................................................... 2-5

2.4 Memory allocation .............................................................................................. 2-18 in part 1

2.5 Processor modes ................................................................................................................... 2-6

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2.5.4 Relationship between access addresses and chip select signals CS0 to CS4 .......... 2-9

CHAPTER 3. PROGRAMMABLE I/O PORTS

3.1 Programmable I/O ports ..................................................................................... 3-2 in part 1

3.2 Port peripheral circuits ......................................................................................................... 3-2

3.3 Pull-up function .................................................................................................... 3-8 in part 1

3.4 Internal peripheral devices’ I/O functions (Ports P42 and P5 to P8) ..... 3-10 in part 1

CHAPTER 4. INTERRUPTS

4.1 Overview ................................................................................................................... 4-2 in part 1

4.2 Interrupt sources..................................................................................................... 4-4 in part 1

4.3 Interrupt control ...................................................................................................... 4-6 in part 1

4.4 Interrupt priority level .......................................................................................... 4-10 in part 1

4.5 Interrupt priority level detection circuit .......................................................... 4-11 in part 1

4.6 Interrupt priority level detection time .............................................................. 4-13 in part 1

4.7 How interrupts are processed (from acceptance of interrupt request until

execution of interrupt routine) .......................................................................... 4-14 in part 1

4.8 Return from interrupt routine ............................................................................. 4-17 in part 1

4.9 Multiple interrupts ................................................................................................. 4-17 in part 1

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4.10 External interrupts (INTi interrupt) .................................................................. 4-19 in part 1

4.11 Precautions for interrupts ................................................................................. 4-23 in part 1

CHAPTER 5. KEY INPUT INTERRUPT FUNCTION

5.1 Overview ................................................................................................................. 5-2 in part 1

5.2 Block description ................................................................................................. 5-3 in part 1

5.3 Initial setting example for related registers .................................................. 5-7 in part 1

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