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H8/3028F Datasheet(PDF) 800 Page - Renesas Technology Corp |
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H8/3028F Datasheet(HTML) 800 Page - Renesas Technology Corp |
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800 / 923 page  Rev. 2.00, 09/03, page 770 of 890 RTMCSR—Refresh Timer Control/Status Register H'EE028 DRAM interface 7 CMF 0 R/(W) * 6 CMIE 0 R/W 5 CKS2 0 4 CKS1 0 3 CKS0 0 2 — 1 — 1 — 1 — 0 — 1 — Bit Initial value Read/Write R/W R/W R/W Refresh counter clock select 00 1 0 1 0 1 0 1 0 1 0 1 1 CKS2 CKS1 CKS0 Count operation halted φ/2 used as counter clock φ/8 used as counter clock φ/32 used as counter clock φ/128 used as counter clock φ/512 used as counter clock φ/2048 used as counter clock φ/4096 used as counter clock Compare match interrupt enable 0 1 The CMI interrupt requested by the CMF flag is disabled The CMI interrupt requested by the CMF flag is enabled Compare match flag 0 [Clearing conditions] • Cleared by a reset and in standby mode • Cleared by reading CMF when CMF = 1, then writing 0 in CMF [Setting condition] When RTCNT = RTCOR Description Note: * Only 0 can be written to clear the flag. 1 |
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