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H8/3028F Datasheet(PDF) 822 Page - Renesas Technology Corp |
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H8/3028F Datasheet(HTML) 822 Page - Renesas Technology Corp |
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822 / 923 page ![]() Rev. 2.00, 09/03, page 792 of 890 TSNC—Timer Synchro Register H'FFF61 16-bit timer (all channels) 7 — 1 — Bit Initial value Read/Write 6 — 1 — 5 — 1 — 4 — 1 — 3 — 1 — 2 SYNC2 0 R/W 1 SYNC1 0 R/W 0 SYNC0 0 R/W 0 1 Channel 0 timer counter (TCNT0) operates independently (TCNT0 presetting/clearing is unrelated to other channels) (Initial value) Channel 0 operates synchronously TCNT0 synchronous presetting/synchronous clearing is possible Timer synchronization 0 0 1 Channel 1 timer counter (TCNT1) operates independently (TCNT1 presetting/clearing is unrelated to other channels) (Initial value) Channel 1 operates synchronously TCNT1 synchronous presetting/synchronous clearing is possible Timer synchronization 1 0 1 Channel 2 timer counter (TCNT2) operates independently (TCNT2 presetting/clearing is unrelated to other channels) (Initial value) Channel 2 operates synchronously TCNT2 synchronous presetting/synchronous clearing is possible Timer synchronization 2 Reserved bits |
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