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H8/3002 Datasheet(PDF) 152 Page - Renesas Technology Corp |
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H8/3002 Datasheet(HTML) 152 Page - Renesas Technology Corp |
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152 / 700 page  6.4.3 BREQ Input Timing After driving the BREQ pin low, hold it low until BACK goes low. If BREQ returns to the high level before BACK goes low, the bus arbiter may operate incorrectly. To terminate the external-bus-released state, hold the BREQ signal high for at least three states. If BREQ is high for too short an interval, the bus arbiter may operate incorrectly. • If contention occurs between a transition to software standby mode and a bus request from an external bus master, the bus may be released for one state just before the transition to software standby mode (see figure 6-23). When using software standby mode, clear the BRLE bit to 0 in BRCR before executing the SLEEP instruction. Figure 6-23 Contention between Bus-Released State and Software Standby Mode 137 ø BREQ Address bus strobe BACK Software standby mode Bus-released state |
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