Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

M38K09RFS Datasheet(PDF) 44 Page - Renesas Technology Corp

Part # M38K09RFS
Description  RENESAS 8-BIT SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 38000 SERIES
PDF  328 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M38K09RFS Datasheet(HTML) 44 Page - Renesas Technology Corp

Back Button M38K09RFS Datasheet HTML 40Page - Renesas Technology Corp M38K09RFS Datasheet HTML 41Page - Renesas Technology Corp M38K09RFS Datasheet HTML 42Page - Renesas Technology Corp M38K09RFS Datasheet HTML 43Page - Renesas Technology Corp M38K09RFS Datasheet HTML 44Page - Renesas Technology Corp M38K09RFS Datasheet HTML 45Page - Renesas Technology Corp M38K09RFS Datasheet HTML 46Page - Renesas Technology Corp M38K09RFS Datasheet HTML 47Page - Renesas Technology Corp M38K09RFS Datasheet HTML 48Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 44 / 328 page
background image
FUNCTIONAL DESCRIPTION
Rev.2.00
Oct 05, 2006
page 27 of 112
38K0 Group
REJ09B0337-0200
HARDWARE
USB Function Control Circuit (USBFCC)
Block Diagram
The following diagram shows the USBFCC block diagram. The cir-
cuit comprises:
(1) Serial Interface Engine (SIE)
(2) Device Control Unit (DCU)
(3) Internal Memory Interface (MIF)
(4) CPU Interface (CIF)
Fig. 24 USB Function Control Circuit (USBFCC) block diagram
(1) Serial Interface Engine (SIE)
The SIE performs the following USB lower-layer protocols (pack-
ets, transactions):
•Sampling of receive data and clock, generation of transmit clock
•Serial-to-parallel conversion of transmit/receive data
•NRZI (Non Return Zero Invert) encode/decode
•Bit stuffing/unstuffing
•SYNC (Synchronization Pattern) detection, EOP (End of
Packet) detection
•USB address detection, endpoint detection
•CRC (Cyclic Redundancy Check) generation and checking
(2) Device Control Unit (DCU)
The DCU manages the following USB upper-layer protocols (ad-
dress/endpoint and control-transfer sequence):
•Status control for each endpoint
•Control-transfer sequence control
•Memory interface status control
(3) Memory Interface (MIF)
The MIF controls the flow of data transfer between the SIE and the
multi-channel RAM under the management of the DCU.
(4) CPU Interface (CIF)
The CIF performs the following functions:
•Mode setting via registers, DCU control signal generation, DCU
status signal reading
•Interrupt signal generation
•Internal bus interface control.
USB Function Control Circuit
DCU control
DCU status
MIF control
SIE control
SIE status
Transmit/Receive
data
D0+
D0-
Multi-Channel RAM



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com