M38K09RFS datasheet(128/328 Pages) RENESAS

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FUNCTIONAL DESCRIPTION SUPPLEMENT

Rev.2.00

Oct 05, 2006

page 111 of 112

38K0 Group

REJ09B0337-0200

HARDWARE

FUNCTIONAL DESCRIPTION SUPPLEMENT

A/D Converter

A/D conversion is started by setting AD conversion completion bit to

“0.” During A/D conversion, internal operations are performed as fol-

lows.

1. After the start of A/D conversion, AD conversion register goes to

“0016.”

2. The highest-order bit of AD conversion register is set to “1,” and

the comparison voltage Vref is input to the comparator. Then, Vref

is compared with analog input voltage VIN.

3. As a result of comparison, when Vref < VIN, the highest-order bit

of AD conversion register becomes “1.” When Vref > VIN, the

highest-order bit becomes “0.”

By repeating the above operations up to the lowest-order bit of the

AD conversion register, an analog value converts into a digital

value.

A/D conversion completes at 122 clock cycles (15.25

µs at system

clock = 8 MHz, Through mode) after it is started, and the result of

the conversion is stored into the AD conversion register.

Concurrently with the completion of A/D conversion, A/D conversion

interrupt request occurs, so that the AD conversion interrupt request

bit is set to “1.”

✽1–✽10: A result of the first comparison to the tenth comparison

Table 16 Change of AD conversion register during A/D conversion

At start of conversion

First comparison

Second comparison

Third comparison

After completion of tenth

comparison

A result of A/D conversion

✽

Change of AD conversion register

Value of comparison voltage (Vref)

VREF

1024

± • • • •

✽

1 ✽2

✽

1 ✽2 ✽3 ✽4 ✽5 ✽6 ✽7 ✽8 ✽9 ✽10

Table 15 Relative formula for a reference voltage VREF of A/D

converter and Vref

VREF

1024

When n = 0

Vref = 0

When n = 1 to 1023

Vref =

✕ n

n: Value of A/D converter (decimal numeral)

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