M38K09RFS datasheet(297/328 Pages) RENESAS

297 / 328 page

3.4 List of registers

Rev.2.00

Oct 05, 2006

page 56 of 89

38K0 Group

REJ09B0337-0200

APPENDIX

Fig. 3.4.43 Structure of Serial I/O status register

Serial I/O status register

b7 b6 b5 b4 b3 b2 b1 b0

Function

At reset

Name

Serial I/O status register (SIOSTS) [Address : 2716]

Nothing is allocated for this bit. This is a write disabled bit.

When this bit is read out, the contents are “1”.

Transmit buffer empty flag

(TBE)

0 : (OE) U (PE) U (FE) = 0

1 : (OE) U (PE) U (FE) = 1

Overrun error flag (OE)

0 : Buffer full

1 : Buffer empty

Receive buffer full flag (RBF)

Transmit shift register shift

completion flag (TSC)

Parity error flag (PE)

Framing error flag (FE)

Summing error flag (SE)

0 : Buffer empty

1 : Buffer full

0 : Transmit shift in progress

1 : Transmit shift completed

0 : No error

1 : Overrun error

0 : No error

1 : Parity error

0 : No error

1 : Framing error

CPU channel receive enable bit

CPU channel transmit enable bit

Memory channel operation

enable bit

Not used

RXB_ENB

TXB_ENB

MC_ENB

b7:b3

–

EXB interrupt source enable register (EXBICON) [address 003016]

(Note)

000

Bit name

Bit symbol

At reset

Function

H/W

S/W

0 : Operation disabled (Interrupt disabled)

1 : Operation enabled (Receive buffer full interrupt enabled)

0 : Operation disabled (Interrupt disabled)

1 : Operation enabled (Transmit buffer empty interrupt enabled)

0 : Operation disabled (Memory channel operation end

interrupt disabled)

1 : Operation enabled (Memory channel operation end

interrupt disabled)

Write “0” when writing.

“0” is read when reading.

–: State remaining

Note: Do not set each bit simultaneously.

Fig. 3.4.44 Structure of EXB interrupt source enable register

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