UPSD3233 datasheet(84/170 Pages) STMICROELECTRONICS

84 / 170 page

uPSD3234A, uPSD3234BV, uPSD3233B, uPSD3233BV

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Table 68. Description of the UISTA Bits

Table 69. USB Endpoint0 Transmit Control Register (UCON0: 0EAh)

Bit

Symbol

R/W

Function

7SUSPND

R/W

USB Suspend Mode Flag.

To save power, this bit should be set if a 3ms constant idle state is

detected on USB bus. Setting this bit stops the clock to the USB and

causes the USB module to enter Suspend Mode. Software must clear

this bit after the Resume flag (RESUMF) is set while this Resume

Interrupt Flag is serviced

—

Reserved

5RSTF

USB Reset Flag.

This bit is set when a valid RESET signal state is detected on the D+ and

D- lines. When the RSTE bit in the UIEN Register is set, this reset

detection will also generate an internal reset signal to reset the CPU and

other peripherals including the USB module.

4TXD0F

R/W

Endpoint0 Data Transmit Flag.

This bit is set after the data stored in Endpoint 0 transmit buffers has

been sent and an ACK handshake packet from the host is received.

Once the next set of data is ready in the transmit buffers, software must

clear this flag. To enable the next data packet transmission, TX0E must

also be set. If TXD0F Bit is not cleared, a NAK handshake will be

returned in the next IN transactions. RESET clears this bit.

3RXD0F

R/W

Endpoint0 Data Receive Flag.

This bit is set after the USB module has received a data packet and

responded with ACK handshake packet. Software must clear this flag

after all of the received data has been read. Software must also set

RX0E Bit to one to enable the next data packet reception. If RXD0F Bit is

not cleared, a NAK handshake will be returned in the next OUT

transaction. RESET clears this bit.

2TXD1F

R/W

Endpoint1 / Endpoint2 Data Transmit Flag.

This bit is shared by Endpoints 1 and Endpoints 2. It is set after the data

stored in the shared Endpoint 1/ Endpoint 2 transmit buffer has been sent

and an ACK handshake packet from the host is received. Once the next

set of data is ready in the transmit buffers, software must clear this flag.

To enable the next data packet transmission, TX1E must also be set. If

TXD1F Bit is not cleared, a NAK handshake will be returned in the next

IN transaction. RESET clears this bit.

1EOPF

R/W

End of Packet Flag.

This bit is set when a valid End of Packet sequence is detected on the D+

and D-line. Software must clear this flag. RESET clears this bit.

0RESUMF

R/W

Resume Flag.

This bit is set when USB bus activity is detected while the SUSPND Bit is

set.

Software must clear this flag. RESET clears this bit.

543210

TSEQ0

STALL0

TX0E

RX0E

TP0SIZ3

TP0SIZ2

TP0SIZ1

TP0SIZ0

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