UPSD3233 datasheet(12/170 Pages) STMICROELECTRONICS

12 / 170 page

uPSD3234A, uPSD3234BV, uPSD3233B, uPSD3233BV

12/170

52-PIN PACKAGE I/O PORT

The 52-pin package members of the uPSD323X

Devices have the same port pins as those of the

80-pin package except:

■

Port 0 (P0.0-P0.7, external address/data bus

AD0-AD7)

■

Port 2 (P2.0-P2.3, external address bus A8-

A11)

■

Port A (PA0-PA7)

■

Port D (PD2)

■

Bus control signal (RD,WR,PSEN,ALE)

Pin 5 requires a pull-up resistor (2k

Ω for 3V

devices, 7.5k

Ω for 5V devices) for all devices,

with or without USB function.

JTAG TMS

JTAG pin

PLD Macro-cell outputs

PLD inputs

SRAM stand by voltage in-

put (VSTBY)

SRAM battery-on indicator

(PC4)

JTAG pins are dedicated

pins

JTAG TCK

JTAG pin

PC2

VSTBY

I/O

General I/O port pin

PC3

TSTAT

I/O

General I/O port pin

PC4

TERR_

I/O

General I/O port pin

JTAG TDI

JTAG pin

JTAG TDO

JTAG pin

PC7

I/O

General I/O port pin

PD1

CLKIN

I/O

General I/O port pin

PLD I/O

Clock input to PLD and APD

PD2

I/O

General I/O port pin

PLD I/O

Chip select to PSD Module

Vcc

GND

USB+

Port Pin

Signal

Name

Pin No.

In/Out

Function

Basic

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