TMC2193 datasheet(25/72 Pages) CADEKA

25 / 72 page

PRODUCT SPECIFICATION

TMC2193

REV. 1.0 3/26/03

Burst Envelope

The TMC2193 includes the ability to adjust the burst ampli-

tude and the shape of the burst. The Control Registers

BRSTFULL, BRST1 and BRST2 hold the magnitude of the

burst vector. BRSTFULL is the maximum amplitude of the

burst vector. BRST1 and BRST2 determine the intermediate

values of the burst vector for the burst envelope shaping. A 5

pixel burst envelope shaping occurs at the rising and falling

edges of burst. At the rising edge of burst the next 5 pixels

have the following weighting; BRSTFULL – BRST1,

BRSTFULL – BRST2, BRSTFULL/2, BRST2, and BRST1.

At the falling edge of burst the next 5 pixels have the follow-

ing weighting; BRST1, BRST2, BRSTFULL/2, BRSTFULL

– BRST2, and BRSTFULL – BRST1. With this ﬂexibility

the user determine the shape, amplitude and width of the

burst signal.

Figure 16. Burst Envelope

Color-Difference Low-Pass Filters

The chrominance portion of a composite video signal must

be sufﬁciently bandlimited to avoid cross-color and cross-

luminance distortion, and to preclude exceeding the allow-

able bandwidth of a video channel.

The color-difference low-pass ﬁlters on the TMC2193

establish chrominance bandwidths which meet the speciﬁca-

tions outlined in CCIR Report 624-3, Table II, Item 2.6, for

system I over a range of pixel rates from 12.27 Mpps to

14.75 Mpps. Equal bandwidth is established for both color-

difference channels.

Figure 17. Gaussian Filter Response

Sync and Pedestal Insertion

Control Registers for this section

Pedestal Enable

The TMC2193 has the ability to independently select lines

for pedestal insertion during the vertical blanking interval

(VBI). For 525-line systems and using the NTSC line num-

bering convention, in which the ﬁrst vertical serration is on

line 4 for ﬁeld 1 and line 266 for ﬁeld 2, the vertical interval

lines map to the control registers VBIPEDxy as shown in

Table 15.

BRSTFULL

BRST1

BRST2

BRSTFULL/2

BRSTFULL - BRST2

BRSTFULL - BRST1

BLANK

65-6294-18

Address

Bit(s)

Name

0x06

7-6

MODE

0x10

1-0

OUTMODE

0x11

COMP2DB

0x14

7-0

VBIPEDEM

0x15

7-0

VBIPEDEL

0x16

7-0

VBIPEDOM

0x17

7-0

VBIPENOL

0x1A

6-0

PEDHGT1

0x3F

C2DB_OFF

0x4B

7-0

NMBD

0x4B

7-4

PEDHGT2

-80

-70

-60

-50

-40

-30

-20

-10

0.1

0.2

0.3

0.4

0.5

Normalized Frequency (Pixel rate)

Table 15. Line by Line Pedestal Enable

Bit

76543210

VBIPEDEL

VBIPEDEM

25*

VBIPEDOL

279

278

277

276

275

274

273

VBIPEDOM

287*

286

285

284

283

282

281

280

TMC2193 Datasheet(PDF) 25 Page - Cadeka Microcircuits LLC.

TMC2193 Datasheet(HTML) 25 Page - Cadeka Microcircuits LLC.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72

Datasheet Download

Link URL