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MPC2F35 Datasheet(PDF) 31 Page - Megawin Technology Co., Ltd |
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MPC2F35 Datasheet(HTML) 31 Page - Megawin Technology Co., Ltd |
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31 / 46 page  MEGAWIN MPC2F35_USB Data Sheet 31 TXCON: Transmit FIFO Control Register (Endpoint-Indexed) Read/Write Address: 34H Default: 0XXX_XXXX System Reset or USB Reset Bit Number Bit Mnemonic Function 7 TXCLR Transmit FIFO Clear: Set this bit to flush the entire transmit FIFO. All FIFO statuses are reverted to their reset states. Hardware clears this bit when the flush operation is completed. 6 - Reserved: Write zero to this bit. 5 - Reserved: Write zero to this bit. 4 - Reserved: Write zero to this bit. 3 - Reserved: Write zero to this bit. 2 - Reserved: Write zero to this bit. 1 - Reserved: Write zero to this bit. 0 - Reserved: Write zero to this bit. |
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