MPC2F35L datasheet(14/46 Pages) MEGAWIN

14 / 46 page

MPC2F35_USB Data Sheet

MEGAWIN

P3_CR: Configure P3.0 ~ P3.7 to be input or output individually. 0: input, 1: output

P3_MR: Configure the output mode of P3.0 ~ P3.7 with a 17k ohm pull-high resistor, CMOS

or NMOS open drain

When port 3 is used as the input mode, it provides the pin interrupt function while a falling edge occurs

at any pin of the port 3 and will set the P3 bit of the IRQ_ST SFR. The same event can release the stop

mode to enable the oscillator, and this interrupt also can release the halt mode if the P3 bit in the

RLH_EN SFR is set. Finally, an interrupt subroutine will be executed if setting the P3 bit in the IRQ_E

SFR.

Port 4

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

00D1H

P4_BUF

BP47

BP46

BP45

BP44

BP43

BP42

BP41

BP40

√

00DCH

P41

P40

√

0250H

P4_CR

CP41

CP40

√

0251H

P4_MR

MP41

MP40

√

MPC2F35 only provide two pins (P4.0 and P4.1) on the port 4, and these pins also are I/O pins. The

structure is the same with Port 0, and please refers to Port 0 for more information.

P4_BUF: Port 4 output buffer. When P4.n is configured as an output pin, it outputs the content

of P4_BUF.n.

P4: Values on Port 4 pins while reading from Port 4.

P4_CR: Configure P4.0 and P4.1 to be input or output individually. 0: input, 1: output

P4_MR: Configure the output mode of P4.0 and P4.1 with a 17k ohm pull-high resistor,

CMOS or NMOS open drain

I/O PIN

P0.n

DATA

BUS

Buffer

Output

P0_MR.1

P0_CR.x

LDA P0_BUF

Instruction

Enable

Vdd

Input/Output Pin --- P0~P4

P0_MR.0

Enable

LDA P0

Instruction

Enable

P0_CR.x

P0_MR.1

MPC2F35L Datasheet(PDF) 14 Page - Megawin Technology Co., Ltd

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