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STM32W108HB Datasheet(PDF) 124 Page - STMicroelectronics |
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STM32W108HB Datasheet(HTML) 124 Page - STMicroelectronics |
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124 / 179 page  General-purpose timers STM32W108CB, STM32W108HB 124/179 Doc ID 16252 Rev 2 8.3.8 Timer x counter register (TIMx_CNT) Address offset: 0xE024 (TIM1) and 0xF024 (TIM2) Reset value: 0x0000 0000 8.3.9 Timer x prescaler register (TIMx_PSC) Address offset: 0xE028 (TIM1) and 0xF028 (TIM2) Reset value: 0x0000 0000 [5] TIM_CC2P Refer to the CC4P description above. [4] TIM_CC2E Refer to the CC43 description above. [1] TIM_CC1P Refer to the CC4P description above. [0] TIM_CC1E Refer to the CC4E description above. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 TIM_CNT rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw [15:0] TIM_CNT: Counter value 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 TIM_PSC rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw [3:0] TIM_PSC: Prescaler value The prescaler divides the internal timer clock frequency. The counter clock frequency CK_CNT is equal to fCK_PSC / (2 ^ TIM_PSC). Clock division factors can range from 1 through 32768. The division factor is loaded into the shadow prescaler register at each update event (including when the counter is cleared through TIM_UG bit of TMR1_EGR register or through the trigger controller when configured in reset mode). |
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