DM9801A datasheet(7/60 Pages) DAVICOM

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DM9801A

1M Home Phoneline Network Physical Layer Single Chip Transceiver

Final

Version: DM9801A-DS-F01

May 30, 2001

CONFI

Configuration Selected

TXLED, RXLED and COLLED configuration

ACTLED, LNKLED and COLLED

configuration *

ACTLED, LNKLED and COLLED

configuration with MII Management Register

0-6 emulation support *

ACTLED, LNKLED and COLLED

Configuration with MII Management

support

*see the DM9801A description for a more detailed explanation

INTFSEL

Interface Select:

This pin, when combined with pin 62, 63 (CONFIG1, CONFIG0),selects

among the following different data interfaces and management interfaces:

INTFSEL

CONFIG0

CONFIG

INTER

FACE

MANAGEMENT

MII Mode

MII

MDC/MDIO

GPSI

Mode

GPSI

SPI

GM Mode

GPSI

MDC/MDIO

CMDENA

Command Enable:

This pin enables a remote master node to alter the management register

values of the local DM9801A.

SPDSEL

Speed Select:

This pin will select the 1M network speed.

0 = Low Speed

1 = High Speed

PWRSEL

Power Select:

This pin will select the 1M network power.

0 = Low Power

1 = High Power

TRIDRV

Tri-state all Outputs:

This pin, when asserted high, will tri-state all outputs (no effect on open-

drain outputs).

FWENA

Four Wire Interface Enable:

This pin, when asserted high, will enable the HNPB and HNNB driver pair

for operation. When low, the secondary drivers are powered down.

INT#

Interrupt Request:

This pin will be asserted low when an interrupt condition exists in the

DM9801A.

DM9801A Datasheet(PDF) 7 Page - Davicom Semiconductor, Inc.

DM9801A Datasheet(HTML) 7 Page - Davicom Semiconductor, Inc.

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