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DM9801A Datasheet(PDF) 13 Page - Davicom Semiconductor, Inc. |
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DM9801A Datasheet(HTML) 13 Page - Davicom Semiconductor, Inc. |
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13 / 60 page ![]() DM9801A 1M Home Phoneline Network Physical Layer Single Chip Transceiver Final 13 Version: DM9801A-DS-F01 May 30, 2001 MII Interface Transmit and Receive Timing Diagram (continued) TX_CLK RX_CLK TX_EN TXD CRS RXD COL RX_DV 0 5 (Preamble) D 0 DATA Once TX_EN is asserted, DM9801A stops RX_CLK, asserts CRS, and toggles TX_CLK at 933.3 ns. TXPKT – TX_EN Asserted Figure 5 TX_CLK RX_CLK TX_EN TXD CRS RXD COL RX_DV D DATA 5 (Preamble) 0 DATA 5 D TX_CLK continues to toggle at 933.3 ns until the SFD is observed, as shown in the first section of the above diagram. At this point, TX_CLK is disabled (high) until AID header has been transmitted on the wire (or until a COL has been detected). This takes about 120 us, at which time RX_CLK starts toggling, thereby shifting 32 bits of preamble and SFD back to the MAC. Sometime later, the TX_CLK restarts as symbols get sent onto the wire in an analogous manner as RX_CLK during packet reception. TXPKT – RX_CLK Active Figure 6 |
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