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SFSL5.5MDB Datasheet(PDF) 8 Page - Yamar Electronics Ltd.

Part # SFSL5.5MDB
Description  for DC-LIN Asynchronous Communication Over Noisy Lines
PDF  12 Pages
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Manufacturer  YAMAR [Yamar Electronics Ltd.]
Direct Link  http://www.yamar.com
Logo YAMAR - Yamar Electronics Ltd.

SFSL5.5MDB Datasheet(HTML) 8 Page - Yamar Electronics Ltd.

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Proprietary and Confidential Information of YAMAR Electronics Ltd.
@ 2007 Yamar Electronics Ltd.
8
DS-SIG40 R1.8
0[4]
nAuto sleep
R/W
1 0 = Automatically enters into Sleep Mode
when no reception from the DC line for 8 Sec.
1
0[6:5]
For future use
00
0[7]
Interference
R
1 Interference Detected indication
-
1[5:0]
F0, F1, bit rate select R/W
6 See Tables 4.2 and 4.3
“FF”H
1[7:6]
For future use
Should be “11”
11
4.3
SIG40 Configuration
The SIG40 operates at default with the following parameters:
Bit rate: 19.2 kbps
F0=5.5MHz, F1=6.5MHz
The following configuration bits set the operating frequencies according to table 4.2.
Table 4.2 – F0, F1 select
Control_register1
(3:0)
F0
F1
0000
3.58Mhz
4.5Mhz
0001
3.58Mhz
5.5Mhz
0010
3.58Mhz
6Mhz
0011
3.58Mhz
6.5Mhz
0100
4.5Mhz
5.5Mhz
0101
4.5Mhz
6Mhz
0110
4.5Mhz
6.5Mhz
0111
4.5Mhz
Reserved
1000
Reserved
Reserved
1001
5.5Mhz
Reserved
1010
5.5Mhz
Reserved
1011
6Mhz
Reserved
1100
6Mhz
Reserved
1101
6.5Mhz
Reserved
1110
6.5Mhz
Reserved
1111
5.5Mhz
6.5Mhz
Table 4.3 – bit rates select
Control_register_1
(5:4)
01 = 57.6Kbps
10 =
Reserved
00 = 38.4Kbps
11 = 19.2Kbps
4.3.1
Command Mode
When in command mode, the host can configure the device according to the desired operating
parameters. The device enters command mode when pin HDC is lowered to zero. When in command
mode, data on the HDI pin is not transmitted to the bus, but is used to configure the SIG40. The
command can be written in any of the allowed Bit Rates.
In order to write to a control register, the host sends two bytes. The first byte begins with the address of
the register followed by 5(hex), and the second byte is the configuration data, as shown in figure 4.2.
The bytes should be sent more than 200nSec after lowering HDC.
Higher nibble [7:4]
Lower nibble [3:0]
First Byte
Register Address
5(hex)
Second Byte
Configuration Data
Configuration Data
Table 4.4 - Write Command
Figure 4.3 shows the pins involved in the writing process:



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