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SFSL5.5MDB Datasheet(PDF) 9 Page - Yamar Electronics Ltd. |
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SFSL5.5MDB Datasheet(HTML) 9 Page - Yamar Electronics Ltd. |
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9 / 12 page ![]() Proprietary and Confidential Information of YAMAR Electronics Ltd. @ 2007 Yamar Electronics Ltd. 9 DS-SIG40 R1.8 T3>1/half bit rate Figure 4.3 - Writing to a Control Register In order to read from a control register, the host sends one byte. The byte should be sent more than 200nSec after lowering HDC. The byte begins with the address of the register followed by ”D”H. The SIG40 will then output the content of the register to pin HDO. Read Command Register Address[3:0] D(hex) Read Command Figure 4.4 shows the pins involved in the reading process: Figure 4.4 - Reading from a Control register Note: Writing to Register 1 Writing a change frequencies command to register 1 is not always interpreted correctly by the device. The device will switch to the correct frequencies pair however, it will not function properly, resulting a communication lost. Workaround: When changing frequencies by writing to register 1, use the following procedure: Lower the H_DC. Send a command to register 1 containing the require frequencies pair and a false bit rate. Raise the H_DC Lower the H_DC Send a command to register 1 containing the require frequencies pair and the required bit rate. Raise the H_DC. For example, when wanting to work with frequencies 3.58MHz and 4.5MHz at 19.2Kbps the correct way to program the device is described in Figure 4.4.1 0x15C0 0x15F0 HDI HDC Sending a command for 3.58MHz/4.5MHz at 38.4Kbps Sending a command for 3.58MHz/4.5MHz at 19.2Kbps Figure 4.4.1 – Writing to Register Note: Changing only the bit rate can be done with a single write, as described above. 4.4 Loopback The device operates like a transceiver, therefor while transmitting or writing a command the HDI signal is looped back to the HDO pin. T1 start bit Address stop bit HDI Read Command: HDC: 0 1 3 2 HDI HDC stop bit T3 start bit Address start bit stop bit Configuration Data 0 1 3 2 0 1 3 2 4 5 7 6 d a t a start bit Data T1 T2 |
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