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6

DS-SIG40 R1.8

3.4

Frequency Control

The device is designed for operation in two selectable carrier frequencies (channels).

Presence of an interference signal can be read from the device internal register.

3.4.1

Operating Frequency

Bit 0 in control register 0 determines the operating channel F1 or F0.

3.4.2

InterfHop

When high, the device switches its channel automatically whenever an interference signal is detected in

the operating frequency. If the device did not receive any data in the new channel it will return to the

previous channel after 2Sec. if, again, no data has been received for 2Sec. and the interference has

stopped, it will switch frequency once more and will stay at the new channel.

3.4.3

MF0nF1

Output signal indicates the selected channel. F0=”High”, F1= “Low”.

3.5

Crystal Oscillator

The SIG40 is designed to operate with a low cost 32.768KHz crystal connected between OscIn and

OscOut pins. This type of crystal has the advantage of very low power consumption and low cost.

However there are also drawbacks. It is very sensitive to noise and has a temperature dependency that

should be carefully considered when selecting the crystal.

The following guidelines should be used when designing the PCB:

1.

Design the trace length as short as possible.

2.

Avoid thin line on resonator traces (< 0.010"), keep them as wide as possible.

3.

To avoid noise, protect these signals with Ground shields.

The values of C1, C2 in Figure 3.3 oscillator circuitry should be determined according to the crystal

manufacturer recommendations.

3.5.1

Recommended 32.768KHz Crystal Specifications

Type

Value

Nominal Frequency:

32.768KHz

Frequency tolerance @25ºC

+/-20 ppm

Load capacitance

12.5 pF

Serial resistance

50K Ohm (max.)

Drive level

1uW (max.)

Quality factor

50,000 (max.)

Turnover temperature

+25ºC +/- 5ºC

Parabolic constant

-0.04 ppm/ºC² (max.)

Aging

+/-3 ppm in first year (max.)

Operating temperature

-40ºC to + 85ºC

Storage temperature

-55ºC to + 125ºC

The overall frequency tolerance should not exceed 200ppm.

3.6

PLL Power Pins

VccPLL should be connected to Vcc. GndPLL should be connected to ground. The PLL supply has to

be sufficiently powered, to avoid any fluctuations of power supply. A capacitor of at least 47uF should

be connected as close as possible to these pins. It is recommended to keep the lines between 3.3V

power supply and the Vcc pins as short as possible with wide PCB traces.