HCS12 datasheet(324/452 Pages) FREESCALE

324 / 452 page

S12CPUV2 Reference Manual, Rev. 4.0

324

Freescale Semiconductor

Because of the queue, program information is fetched a few cycles before it

is used by the CPU. Internally, the microcontroller unit (MCU) only needs to

buffer the fetched data. But, in order to monitor cycle-by-cycle CPU activity

externally, it is necessary to capture data and address to discern what is

happening in the instruction queue.

Two external pins, IPIPE1 and IPIPE0, provide time-multiplexed information

about data movement in the queue and instruction execution. The

instruction queue and cycle-by-cycle activity can be reconstructed in real

time or from trace history captured by a logic analyzer. However, neither

scheme can be used to stop the CPU12 at a specific instruction. By the time

an operation is visible outside the MCU, the instruction has already begun

execution. A separate instruction tagging mechanism is provided for this

purpose. A tag follows the information in the queue as the queue is

advanced. During debugging, the CPU enters active background debug

mode when a tagged instruction reaches the head of the queue, rather than

executing the tagged instruction. For more information about tagging, refer

to 8.6 Instruction Tagging.

8.3 Instruction Queue Status Signals

The IPIPE1 and IPIPE0 signals carry time-multiplexed information about

data movement and instruction execution during normal CPU operation.

The signals are available on two multifunctional device pins. During reset,

the pins are used as mode-select input signals MODA and MODB.

To reconstruct the queue, the information carried by the status signals must

be captured externally. In general, data movement and execution start

information are considered to be distinct 2-bit values, with the low-order bit

on IPIPE0 and the high-order bit on IPIPE1.

8.3.1 HCS12 Timing Detail

In the HCS12, data-movement information is available when E clock is high

or on falling edges of the E clock; execution-start information is available

when E clock is low or on rising edges of the E clock, as shown in

Figure 8-1. Data-movement information refers to data on the bus.

Execution-start information refers to the bus cycle that starts with that E-low

time and continues through the following E-high time. Table 8-1

summarizes the information encoded on the IPIPE1 and IPIPE0 pins.

HCS12 Datasheet(PDF) 324 Page - Freescale Semiconductor, Inc