HCS12 datasheet(326/452 Pages) FREESCALE

Part #	HCS12

Description	HCS12 Microcontrollers

PDF	452 Pages

Scroll/Zoom	100%

Manufacturer	FREESCALE [Freescale Semiconductor, Inc]

Direct Link	http://www.freescale.com

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326 / 452 page

S12CPUV2 Reference Manual, Rev. 4.0

326

Freescale Semiconductor

Figure 8-2. Queue Status Signal Timing (M68HC12)

Table 8-1. IPIPE1 and IPIPE0 Decoding (HCS12 and M68HC12)

Mnemonic

Meaning

Data Movement

Capture at E Fall in HCS12 (E Rise in M68HC12)

0:0

—

No movement

0:1

LAT(1)

1. The HCS12 implementation does not include a holding latch, so these data movement

codes are used only in the original M68HC12.

Latch data from bus

1:0

ALD

Advance queue and load from bus

1:1

ALL(1)

Advance queue and load from latch

Execution Start

Capture at E Rise in HCS12 (E Fall in M68HC12)

0:0

—

No start

0:1

INT

Start interrupt sequence

1:0

SEV

Start even instruction

1:1

SOD

Start odd instruction

E CLOCK

ADDRESS

DATA

IPIPE[1:0]

ADDR1

ADDR2

DATA1

DATA2

DM0

EX2

DM1

CYCLE 1

CYCLE 2

EX1 REFERS TO

THIS CYCLE

DM0 REFERS TO DATA

CAPTURED AT

PREVIOUS E FALL

DATA0

ADDR0

CYCLE 0

EX1

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