ADT7476ARQZ-R7 datasheet(65/67 Pages) ONSEMI

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ADT7476

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Table 51. Register 0x7C — Configuration Register 5 (Power−On Default = 0x01)

Bit No.

Mnemonic

R/W (Note 1)

Description

[0]

2sC

R/W

2sC = 1 sets the temperature range to the twos complement temperature range.

2sC = 0 changes the temperature range to the Offset 64 temperature range. When this bit is

changed, the ADT7476 interprets all relevant temperature register values as defined by this bit.

[1]

Temp Offset

R/W

TempOffset = 0 sets offset range to −63°C to +64°C with 0.5°C resolution.

TempOffset = 1 sets offset range to −63°C to +127°C with 1°C resolution. These settings

apply to Remote 1, Local, and Remote2 temperature offset registers (0x70, 0x71, and 0x72).

[2]

GPIO6D

R/W

GPIO6 direction. When GPIO6 function is enabled, this determines whether GPIO6 is an

input (0) or an output (1).

[3]

GPIO6P

R/W

GPIO6 polarity. When the GPIO6 function is enabled and is programmed as an output, this

bit determines whether the GPIO6 is active low (0) or high (1).

[4]

VID/GPIO

R/W

VID/GPIO = 0 enables VID functionality on Pin 5, Pin 6, Pin 7, Pin 8, and Pin 19.

VID/GPIO = 1 enables GPIO functionality on Pin 5, Pin 6, Pin 7, Pin 8, and Pin 19.

[5]

R1 THERM

R/W

R1 THERM = 1 enables THERM temperature limit functionality for Remote 1 temperature

channel; that is, THERM is bidirectional.

R1 THERM = 0 indicates THERM is a timer input only. THERM can also be disabled on any

channel by:

Writing −64°C to the appropriate THERM temperature limit in Offset 64 mode.

Writing −128°C to the appropriate THERM temperature limit in twos complement mode.

[6]

Local

THERM

R/W

Local THERM = 1 enables THERM temperature limit functionality for local temperature

channel; that is, THERM is bidirectional.

Local THERM = 0 indicates THERM is a timer input only. THERM can also be disabled on

any channel by:

Writing −64°C to the appropriate THERM temperature limit in Offset 64 mode.

Writing −128°C to the appropriate THERM temperature limit in twos complement mode.

[7]

R2 THERM

R/W

R2 THERM = 1 enables THERM temperature limit functionality for Remote 2 temperature

channel; that is, THERM is bidirectional.

R2 THERM = 0 indicates THERM is a timer input only.THERM can also be disabled on any

channel by:

Writing −64°C to the appropriate THERM temperature limit in Offset 64 mode.

Writing −128°C to the appropriate THERM temperature limit in twos complement mode.

1. This register becomes read−only when the Configuration Register 1 lock bit is set to 1. Any further attempts to write to this register have no effect.

Table 52. Register 0x7D — Configuration Register 4 (Power−On Default = 0x00)

Bit No.

Mnemonic

R/W (Note 1)

Description

[1:0]

PIN14FUNC

R/W

These bits set the functionality of Pin 14.

00 = TACH4 (default)

01 = THERM

10 = SMBALERT

11 = GPIO

[2]

THERM

Disable

R/W

THERM Disable = 0 enables THERM overtemperature output assuming THERM is correctly

configured (Registers 0x78, 0x7C, and 0x7D).

THERM Disable = 1 disables THERM overtemperature output on all channels.

THERM can also be disabled on any channel by:

Writing −64°C to the appropriate THERM temperature limit in Offset 64 mode.

Writing −128°C to the appropriate THERM temperature limit in twos complement mode.

[3]

MaxSpeed

THERM

R/W

MaxSpeed on THERM = 0 indicates that fans go to full speed when THERM temperature

limit is exceeded.

MaxSpeed on THERM = 1 indicates that fans go to max speed (0x38, 0x39, 0x3A) when

THERM temperature limit is exceeded.

[4]

BpAtt 2.5 V

R/W

Bypass 2.5V attenuator. When set, the measurement scale for this channel changes from

0 V (0x00) to 2.25 V (0xFF).

[5]

BpAtt VCCP

R/W

Bypass VCCP attenuator. When set, the measurement scale for this channel changes from

0 V (0x00) to 2.25 V (0xFF).

[6]

BpAtt 5.0 V

R/W

Bypass 5.0 V attenuator. When set, the measurement scale for this channel changes from

0 V (0x00) to 2.25 V (0xFF).

[7]

BpAtt 12 V

R/W

Bypass 12 V attenuator. When set, the measurement scale for this channel changes

from 0 V (0x00) to 2.25 V (0xFF).

1. This register becomes read−only when the Configuration Register 1 lock bit is set to 1. Any further attempts to write to this register have no effect.

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