ADT7476ARQZ-R7 datasheet(23/67 Pages) ONSEMI

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ADT7476

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Interrupt Mask Register 2 (0x75)

Bit 7 (D2) = 1, masks SMBALERT for Diode 2 errors.

Bit 6 (D1) = 1, masks SMBALERT for Diode 1 errors.

Bit 5 (FAN4) = 1, masks SMBALERT for Fan 4 failure.

If the TACH4 pin is being used as the THERM input, this

bit masks SMBALERT for a THERM event. If the TACH4

pin is being used as GPIO6, setting this bit masks interrupts

related to GPIO6.

Bit 4 (FAN3) = 1, masks SMBALERT for Fan 3.

Bit 3 (FAN2) = 1, masks SMBALERT for Fan 2.

Bit 2 (FAN1) = 1, masks SMBALERT for Fan 1.

Bit 1 (OVT) = 1, masks SMBALERT for overtemperature

(exceeding THERM temperature limits).

Bit 0 (12 V/VC) = 1, masks SMBALERT for 12 V channel

or for a VID code change, depending on the function used.

Enabling the SMBALERT Interrupt Output

The SMBALERT interrupt function is disabled by

default. Pin 10 or Pin 14 can be reconfigured as an

SMBALERT output to signal out−of−limit conditions.

Table 11. Configuring Pin 10 as SMBALERT Output

Bit Setting

Configuration Register 3

(0x78)

[1] Pin 10 = SMBALERT

[0] Pin 10 = PWM2

Assigning THERM Functionality to a Pin

Pin 14 on the ADT7476 has four possible functions:

SMBALERT, THERM, GPIO6, and TACH4. The user

chooses the required functionality by setting Bit 0 and Bit 1

of Configuration Register 4 (0x7D).

If THERM is enabled on Bit 1, Configuration Register 3

(0x78):

• Pin 22 becomes THERM.

• If Pin 14 is configured as THERM on Bit 0 and Bit 1 of

Configuration Register 4 (0x7D), THERM is enabled

on this pin.

If THERM is not enabled:

• Pin 22 becomes a 2.5 V measurement input.

• If Pin 14 is configured as THERM, then THERM is

disabled on this pin.

Table 12. Configuring Pin 14

Bit 1

Bit 0

Function

TACH4

THERM

SMBALERT

GPIO6

THERM as an Input

When THERM is configured as an input, the user can time

assertions on the THERM pin. This can be useful for

connecting to the PROCHOT output of a CPU to gauge

system performance.

When the THERM pin is driven low externally, the user

can also set up the ADT7476 to run the fans at 100%. The

fans run at 100% for the duration of time that the THERM

pin is pulled low. This is done by setting the BOOST bit

(Bit 2) in Configuration Register 3 (0x78) to 1. This works

only if the fan is already running, for example, in manual

mode, when the current duty cycle is above 0x00, or in

automatic mode when the temperature is above TMIN.

If the temperature is below TMIN or if the duty cycle in

manual mode is set to 0x00, pulling the THERM low

externally has no effect. See Figure 31 for more information.

Figure 31. Asserting THERM Low as an Input in

Automatic Fan Speed Control Mode

THERM

TMIN

THERM ASSERTED TO LOW AS AN INPUT:

FANS DO NOT GO TO 100% BECAUSE

TEMPERATURE IS BELOW TMIN

THERM ASSERTED TO LOW AS AN INPUT:

FANS GO TO 100% BECAUSE TEMPERATURE

IS ABOVE TMIN AND FANS ARE ALREADY RUNNING.

THERM Timer

The ADT7476 has an internal timer to measure THERM

assertion time. For example, the THERM input can be

connected to the PROCHOT output of a Pentium 4 CPU to

measure system performance. The THERM input can also

be connected to the output of a trip−point temperature

sensor.

The timer is started on the assertion of the ADT7476’s

THERM input and stopped when THERM is de−asserted.

The timer counts THERM times cumulatively; that is, the

timer resumes counting on the next THERM assertion. The

THERM timer continues to accumulate THERM assertion

times until the timer is read (where it is cleared), or until it

reaches full scale. If the counter reaches full scale, it stops

at that reading until cleared.

The 8−bit THERM timer status register (0x79) is designed

so that Bit 0 is set to 1 on the first THERM assertion. Once

the cumulative THERM assertion time has exceeded

45.52 ms, Bit 1 of the THERM timer is set and Bit 0 now

becomes the LSB of the timer with a resolution of 22.76 ms

(see Figure 32).

ADT7476ARQZ-R7 Datasheet(PDF) 23 Page - ON Semiconductor

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