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MC68HC705P9CS Datasheet(PDF) 153 Page - Freescale Semiconductor, Inc |
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MC68HC705P9CS Datasheet(HTML) 153 Page - Freescale Semiconductor, Inc |
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153 / 160 page  MOTOROLA Index 153 Technical Data — MC68HC705P9 Index A accumulator (A) . . . . . . . . . . . . . . .49–50, 53 ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .88 ADC (analog-to-digital converter) block diagram . . . . . . . . . . . . . . . . . . .130 features . . . . . . . . . . . . . . . . . . . . . . . .129 I/O register summary . . . . . . . . . . . . .131 I/O registers . . . . . . . . . . . . . . . . . . . .134 low-power modes . . . . . . . . . . . . . . . .136 ADC data register (ADDR) . . . .132, 134–136 ADC status and control register (ADSCR) . . . . . . . . . .132, 134 addressing modes . . . . . . . . . . . . . . . . . . .50 ADON bit . . . . . . . . . . . . . . . . . . . . .135–136 ADRC bit . . . . . . . . . . . . . . . . .132, 134, 136 alternate timer registers (ATRH/L) . . . . . .113 ALU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44 AN[3:0] bits . . . . . . . . . . . . . . . . . . . . . . . . .88 arithmetic/logic unit (ALU) . . . . . . . . . . . . .45 B bootloader ROM . . . . . . . . . . . . . . . . . . . . .37 bootload procedure . . . . . . . . . . . . . . . .41 bootloader circuit . . . . . . . . . . . . . . . . . .40 location . . . . . . . . . . . . . . . . . . . . . . . . .39 brownout . . . . . . . . . . . . . . . . . . . . . . . .68, 96 bypass capacitors . . . . . . . . . . . . . . . . . . . .26 C C bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 case outlines . . . . . . . . . . . . . . . . . . 149–151 CCF bit . . . . . . . . . . . . . . . . . . . . . . . 132, 134 ceramic resonator circuit . . . . . . . . . . . . . . 28 CH[2:0] bits . . . . . . . . . . . . . . . . . . . . . . .135 condition code register (CCR) . . . 45, 55, 69, 71–72, 112–115 COP register (COPR) . . . . . . . . . . . . . 68, 97 COP watchdog COP in stop mode . . . . . . . . . . . . . . . . 98 COP in wait mode . . . . . . . . . . . . . . . . . 98 COP register (COPR) . . . . . . . . . . . . . . 97 enabling and disabling . . . . . . . . . . . . . 42 features . . . . . . . . . . . . . . . . . . . . . . . . . 95 operation . . . . . . . . . . . . . . . . . . . . . . . .96 timeout period . . . . . . . . . . . . . . . . . . . .96 COP watchdog reset . . . . . . . . . . . 68, 96–97 COPC bit . . . . . . . . . . . . . . . . . . . . 68, 97–98 COPE bit . . . . . . . . . . . . . . . . . . . . . . . . . . 42 CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 block diagram . . . . . . . . . . . . . . . . . . . .45 control unit . . . . . . . . . . . . . . . . . . . . . . 44 features . . . . . . . . . . . . . . . . . . . . . . . . . 44 instruction set summary . . . . . . . . . . . . 58 instruction types . . . . . . . . . . . . . . . . . . 52 instructions set . . . . . . . . . . . . . . . . . . .49 opcode map . . . . . . . . . . . . . . . . . . . . . 64 registers . . . . . . . . . . . . . . . . . . . . . . . .45 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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