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MC68HC705P9CS Datasheet(PDF) 158 Page - Freescale Semiconductor, Inc |
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MC68HC705P9CS Datasheet(HTML) 158 Page - Freescale Semiconductor, Inc |
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158 / 160 page ![]() Index 158 Index MOTOROLA SIOP bit . . . . . . . . . . . . . . . . . . . . . . . . . . .42 SIOP control register (SCR) . . .121, 125, 127 SIOP data register (SDR) . . . . . . . . .126–127 SIOP status register (SSR) . . . . . . . . . . .126 software failure . . . . . . . . . . . . . . . . . . . . . .96 software interrupt vector . . . . . . . . . . . . . . .72 SPE bit . . . . . . . . . . . . . . .121–122, 125, 127 specifications See "electrical specifications." See "mechanical specifications." . . . .148 SPIF bit . . . . . . . . . . . . . . . . . . . . . . . . . . .126 stack pointer (SP) . . . . . . . . . . . . . . . . . . . .36 stack RAM . . . . . . . . . . . . . . . . . . . . . .36, 72 stop mode . . . . . . . . . . . . . . . . . . . . . . . . . .75 effect on ADC . . . . . . . . . . . . . . . . . . .136 effect on capture/compare timer . . . . .116 effect on COP watchdog . . . . . . . . . . . .98 effect on SIOP . . . . . . . . . . . . . . . . . . .128 STOP instruction flowchart . . . . . . . . . .77 stop recovery timing . . . . . . . . . . . . . . .76 STOP/WAIT clock logic . . . . . . . . . . . . .80 supply voltage (VDD) . . . . . . . . . . . . .96, 138 T TCMP pin . . . . . . . . . .29, 103–104, 110, 115 thermal resistance . . . . . . . . . . . . . .139–140 timer block diagram . . . . . . . . . . . . . . . . . . .101 features . . . . . . . . . . . . . . . . . . . . . . . .100 I/O register summary . . . . . . . . . . . . . 102 I/O registers . . . . . . . . . . . . . . . . . . . . 108 interrupts . . . . . . . . . . . . . . . . . . . .71, 108 low-power modes . . . . . . . . . . . . . . . . 116 operation . . . . . . . . . . . . . . . . . . . . . . .101 reading . . . . . . . . . . . . . . . . . . . . 101, 113 timing . . . . . . . . . . . . . . . . . . . . . 105–107 timer control register (TCR) . . . . . . . . 71, 109 timer interrupt vector . . . . . . . . . . . . . . . . . 72 timer registers (TRH/L) . . . . . . . . . . 110–112 timer resolution . . . . . . . . . . . . . . . . . . . . 101 timer status register (TSR) . 71, 110, 114–115 TOF bit . . . . . . . . . . . . . . . . 71, 108, 111–113 TOIE bit . . . . . . . . . . . . . . . . . . . 71, 108–109 V VDD power supply . . . . . . . . . . . . . . . .26, 41 VPP power supply . . . . . . . . . . . . . . . . . . . .41 VSS pin . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 W wait mode . . . . . . . . . . . . . . . . . . . . . . . . . . 78 effect on ADC . . . . . . . . . . . . . . . . . . .136 effect on capture/compare timer . . . . .116 effect on COP watchdog . . . . . . . . . . . . 98 effect on SIOP . . . . . . . . . . . . . . . . . .128 STOP/WAIT clock logic . . . . . . . . . . . . 80 WAIT instruction flowchart . . . . . . . . . .79 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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