| Electronic Components Datasheet Search |
|
R5F562T7DDFM Datasheet(PDF) 33 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
R5F562T7DDFM Datasheet(HTML) 33 Page - Renesas Technology Corp |
|
33 / 94 page ![]() R01DS0096EJ0100 Rev.1.00 Page 33 of 92 Apr 20, 2011 RX62T Group 3. Address Space 3. Address Space 3.1 Address Space This LSI has a 4-Gbyte address space, consisting of the range of addresses from 0000 0000h to FFFF FFFFh. That is, linear access to an address space of up to 4 Gbytes is possible, and this contains both program and data areas. Figure 3.1 shows the memory maps. Figure 3.1 Memory Map (RX62T Group) Reserved area*2 Reserved area*2 0000 0000h 0008 0000h FFFF FFFFh Single-chip mode*1 On-chip RAM Reserved area*2 On-chip ROM (program ROM) (read only) 0010 0000h Peripheral I/O registers 0010 8000h On-chip ROM (data flash) 0080 0000h 0100 0000h On-chip ROM (program ROM) (write only) FFFC 0000h FCU-RAM*3 Reserved area*2 Peripheral I/O registers Reserved area*2 Peripheral I/O registers 007F 8000h 007F A000h 007F C000h 007F C500h 007F FC00h 0000 4000h Reserved area*2 00FC 0000h On-chip ROM (FCU firmware)*3 (read only) Reserved area*2 FEFF E000h FF00 0000h R5F562TAxxxx Reserved area*2 Reserved area*2 0000 0000h 0008 0000h FFFF FFFFh Single-chip mode*1 On-chip RAM Reserved area*2 On-chip ROM (program ROM) (read only) 0010 0000h Peripheral I/O registers 0010 2000h On-chip ROM (data flash) 0080 0000h 0100 0000h On-chip ROM (program ROM) (write only) FFFE 0000h FCU-RAM*3 Reserved area*2 Peripheral I/O registers Reserved area*2 Peripheral I/O registers 007F 8000h 007F A000h 007F C000h 007F C500h 007F FC00h 0000 2000h Reserved area*2 00FE 0000h On-chip ROM (FCU firmware)*3 (read only) Reserved area*2 FEFF E000h FF00 0000h R5F562T7xxxx Reserved area*2 Reserved area*2 0000 0000h 0008 0000h FFFF FFFFh Single-chip mode*1 On-chip RAM Reserved area*2 On-chip ROM (program ROM) (read only) 0010 0000h Peripheral I/O registers 0010 2000h On-chip ROM (data flash) 0080 0000h 0100 0000h On-chip ROM (program ROM) (write only) FFFF 0000h FCU-RAM*3 Reserved area*2 Peripheral I/O registers Reserved area*2 Peripheral I/O registers 007F 8000h 007F A000h 007F C000h 007F C500h 007F FC00h 0000 2000h Reserved area*2 00FF 0000h On-chip ROM (FCU firmware)*3 (read only) Reserved area*2 FEFF E000h FF00 0000h R5F562T6xxxx Notes: 1. The layout of the address space in boot mode is the same as in single-chip mode. 2. Reserved areas should not be accessed, since the correct operation of LSI is not guaranteed if they are accessed. 3. For details on the FCU, see section 30, ROM (Flash Memory for Code Storage) and section 31, Data Flash (Flash Memory for Data Storage) in the User’s manual: Hardware. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |