| Electronic Components Datasheet Search |
|
R5F562T7DDFM Datasheet(PDF) 82 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
R5F562T7DDFM Datasheet(HTML) 82 Page - Renesas Technology Corp |
|
82 / 94 page ![]() R01DS0096EJ0100 Rev.1.00 Page 82 of 92 Apr 20, 2011 RX62T Group 5. Electrical Characteristics 5.5 Power-on Reset Circuit, Voltage Detection Circuit Characteristics Note 1. The power-off time indicates the time when VCC is below the minimum value of voltage detection levels VPOR, Vdet1, and Vdet2 for the POR/ LVD. Figure 5.20 Power-on Reset Timing Table 5.17 Power-on Reset Circuit, Voltage Detection Circuit Characteristics Note:Items for which test conditions are not specifically stated in the table below have the same values under conditions 1 to 3. Condition 1: VCC = PLLVCC = 2.7 to 3.6 V, VSS = PLLVSS = AVSS0 = AVSS = VREFL0 = 0 V AVCC0 = AVCC = 3.0 to 3.6 V, VREFH0 = 3.0 V to AVCC0, VREF = 3.0 V to AVCC Condition 2: VCC = PLLVCC = 2.7 to 3.6 V, VSS = PLLVSS = AVSS0 = AVSS = VREFL0 = 0 V AVCC0 = AVCC = 4.0 to 5.5 V, VREFH0 = 4.0 V to AVCC0, VREF = 4.0 V to AVCC Ta = -40 to +85°C. Ta is the same under conditions 1 to 3. Item Symbol Min. Typ. Max. Unit Test Conditions Voltage detection level Power-on reset (POR) VPOR 2.48 2.60 2.72 V Figure 5.20 Voltage detection circuit (LVD) Vdet1 2.68 2.80 2.92 Figure 5.21 Vdet2 2.98 3.10 3.22 Figure 5.22 Internal reset time tPOR 20 35 50 ms Figure 5.21 and Figure 5.22 Min. VCC down time*1 tVOFF 200 - - us Figure 5.20 to Figure 5.22 Reply delay time tdet - - 200 us Condition 3: VCC = PLLVCC = 4.0 to 5.5 V, VSS = PLLVSS = AVSS0 = AVSS = VREFL0 = 0 V AVCC0 = AVCC = 4.0 to 5.5 V, VREFH0 = 4.0 V to AVCC0, VREF = 4.0 V to AVCC Ta = -40 to +85°C Item Symbol Min. Typ. Max. Unit Test Conditions Voltage detection level Power-on reset (POR) VPOR 3.70 3.90 4.10 V Figure 5.20 Voltage detection circuit (LVD) Vdet1 3.95 4.15 4.35 Figure 5.21 Vdet2 4.40 4.60 4.80 Figure 5.22 Internal reset time tPOR 20 35 50 ms Figure 5.21 and Figure 5.22 Min. VCC down time*1 tVOFF 200 - - us Figure 5.20 to Figure 5.22 Reply delay time tdet - - 200 us Internal reset signal (low valid) VCC t VOFF VPOR t POR t POR tdet |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |