 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
PCIMX536AVV8C Datasheet(PDF) 55 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
PCIMX536AVV8C Datasheet(HTML) 55 Page - Freescale Semiconductor, Inc |
|
|
55 / 178 page  Electrical Characteristics i.MX53xA Automotive and Infotainment Applications Processors, Rev. 2 Freescale Semiconductor 55 WE3 BCLK High Level Width 0.4*t 0.8*t 1.2*t 1.6*t WE4 Clock rise to address valid3 -0.5*t-1.25 -0.5*t+1.75 -t-1.25 -t+1.75 -1.5*t-1.2 5 -1.5*t +1.75 -2*t-1.25 -2*t+1.75 WE5 Clock rise to address invalid 0.5*t-1.25 0.5*t+1.75 t-1.25 t+1.75 1.5*t-1.2 5 1.5*t +1.75 2*t-1.25 2*t+1.75 WE6 Clock rise to CSx_B valid -0.5*t-1.25 -0.5*t+1.75 -t-1.25 -t+1.75 -1.5*t-1.2 5 -1.5*t +1.75 -2*t-1.25 -2*t+1.75 WE7 Clock rise to CSx_B invalid 0.5*t-1.25 0.5*t+1.75 t-1.25 t+1.75 1.5*t-1.2 5 1.5*t +1.75 2*t-1.25 2*t+1.75 WE8 Clock rise to WE_B Valid -0.5*t-1.25 -0.5*t+1.75 -t-1.25 -t+1.75 -1.5*t-1.2 5 -1.5*t +1.75 -2*t-1.25 -2*t+1.75 WE9 Clock rise to WE_B Invalid 0.5*t-1.25 0.5*t+1.75 t-1.25 t+1.75 1.5*t-1.2 5 1.5*t +1.75 2*t-1.25 2*t+1.75 WE10 Clock rise to OE_B Valid -0.5*t-1.25 -0.5*t+1.75 -t-1.25 -t+1.75 -1.5*t-1.2 5 -1.5*t +1.75 -2*t-1.25 -2*t+1.75 WE11 Clock rise to OE_B Invalid 0.5*t-1.25 0.5*t+1.75 t-1.25 t+1.75 1.5*t-1.2 5 1.5*t +1.75 2*t-1.25 2*t+1.75 WE12 Clock rise to BEy_B Valid -0.5*t-1.25 -0.5*t+1.75 -t-1.25 -t+1.75 -1.5*t-1.2 5 -1.5*t +1.75 -2*t-1.25 -2*t+1.75 WE13 Clock rise to BEy_B Invalid 0.5*t-1.25 0.5*t+1.75 t-1.25 t+1.75 1.5*t-1.2 5 1.5*t +1.75 2*t-1.25 2*t+1.75 WE14 Clock rise to ADV_B Valid -0.5*t-1.25 -0.5*t+1.75 -t-1.25 -t+1.75 -1.5*t-1.2 5 -1.5*t +1.75 -2*t-1.25 -2*t+1.75 WE15 Clock rise to ADV_B Invalid 0.5*t-1.25 0.5*t+1.75 t-1.25 t+1.75 1.5*t-1.2 5 1.5*t +1.75 2*t-1.25 2*t+1.75 WE16 Clock rise to Output Data Valid -0.5*t-1.25 -0.5*t+1.75 -t-1.25 -t+1.75 -1.5*t-1.2 5 -1.5*t +1.75 -2*t-1.25 -2*t+1.75 WE17 Clock rise to Output Data Invalid 0.5*t-1.25 0.5*t+1.75 t-1.25 t+1.75 1.5*t-1.2 5 1.5*t +1.75 2*t-1.25 2*t+1.75 WE18 Input Data setup time to Clock rise 2 — 4 — — ——— WE19 Input Data hold time from Clock rise 2 — 2 — — ——— WE20 WAIT_B setup time to Clock rise 2 — 4 — — ——— WE21 WAIT_B hold time from Clock rise 2 — 2 — — ——— Table 38. EIM Bus Timing Parameters (continued)1 ID Parameter BCD = 0 BCD = 1 BCD = 2 BCD = 3 Min Max Min Max Min Max Min Max |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
New Zealand ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
