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ST10F280 Datasheet(PDF) 175 Page - STMicroelectronics |
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ST10F280 Datasheet(HTML) 175 Page - STMicroelectronics |
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175 / 239 page ![]() ST10F280 System reset Doc ID 8673 Rev. 3 175/239 17.5 RSTOUT pin and bidirectional reset The RSTOUT pin is driven active (low level) at the beginning of any reset sequence (synchronous/asynchronous hardware, software and watchdog timer resets). RSTOUT pin stays active low beyond the end of the initialization routine, until the protected EINIT instruction (End of Initialization) is completed. The Bidirectional Reset function is useful when external devices require a reset signal but cannot be connected to RSTOUT pin, because RSTOUT signal lasts during initialisation. It is, for instance, the case of external memory running initialization routine before the execution of EINIT instruction. Bidirectional reset function is enabled by setting bit 3 (BDRSTEN) in SYSCON register. It only can be enabled during the initialization routine, before EINIT instruction is completed. When enabled, the open drain of the RSTIN pin is activated, pulling down the reset signal, for the duration of the internal reset sequence (synchronous/asynchronous hardware, software and watchdog timer resets). At the end of the internal reset sequence the pull down is released and the RSTIN pin is sampled 8 TCL periods later. ● If signal is sampled low, a hardware reset is triggered again. ● If it is sampled high, the chip exits reset state according to the running reset way (synchronous/asynchronous hardware, software and watchdog timer resets ). Note: The bidirectional reset function is disabled by any reset sequence (Bit BDRSTEN of SYSCON is cleared). To be activated again it must be enabled during the initialization routine. 17.6 Reset circuitry The internal reset circuitry is described in Figure 68. An internal pull-up resistor is implemented on RSTIN pin. (50k Ω minimum, to 250kΩ maximum). The minimum reset time must be calculated using the lowest value. In addition, a programmable pull-down (bit BDRSTEN of SYSCON register) drives the RSTIN pin according to the internal reset state as explained in Section 17.5: RSTOUT pin and bidirectional reset. The RSTOUT pin provides a signals to the application as described in Section 17.5: RSTOUT pin and bidirectional reset. A weak internal pull-down is connected to the RPD pin to discharge external capacitor to Vss at a rate of 100 μA to 200μA. This Pull-down is turned on when RSTIN pin is low If bit PWDCFG of SYSCON register is set, an internal pull-up resistor is activated at the end of the reset sequence. This pull-up charges the capacitor connected to RPD pin. If Bidirectional Reset function is not used, the simplest way to reset ST10F280 is to connect external components as shown in Figure 69. It works with reset from application (hardware or manual) and with power-on. The value of C1 capacitor, connected on RSTIN pin with internal pull-up resistor (50k Ω to 250kΩ), must lead to a charging time long enough to let the internal or external oscillator and / or the on-chip PLL to stabilize. The R0-C0 components on RPD pin are mainly implemented to provide a time delay to exit Power down mode (see Chapter 18: Power reduction modes). Nervertheless, they drive RPD pin level during resets and they lead to different reset modes as explained hereafter. On power-on, C0 is totaly discharged, a low level on RPD pin forces an asynchronous |
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