 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
WM8961GEFL/V Datasheet(PDF) 16 Page - Wolfson Microelectronics plc |
|
|
|||||||||||||||||||||||||||||
WM8961GEFL/V Datasheet(HTML) 16 Page - Wolfson Microelectronics plc |
|
|
16 / 116 page  WM8961 Pre-Production w PP, August 2009, Rev 3.1 16 CONTROL INTERFACE TIMING The WM8961 is controlled via a 2-wire serial control interface. SDIN SCLK t 3 t 1 t 6 t 2 t 7 t 5 t 4 t 3 t 8 t 9 Figure 4 2-Wire Serial Control Interface Timing Test Conditions MICVDD=2.5V, DVDD = CPVDD=AVDD =1.8V SPKVDD1 = SPKVDD2 = 5V, DGND=AGND=CPGND=SPKGND1=SPKGND2=0V, TA=+25 oC, Slave Mode, fs=48kHz, MCLK = 256fs, 24-bit data, unless otherwise stated. PARAMETER SYMBOL MIN TYP MAX UNIT Program Register Input Information SCLK Frequency 526 kHz SCLK Low Pulse-Width t1 1.3 us SCLK High Pulse-Width t2 600 ns Hold Time (Start Condition) t3 600 ns Setup Time (Start Condition) t4 600 ns Data Setup Time t5 100 ns SDIN, SCLK Rise Time t6 300 ns SDIN, SCLK Fall Time t7 300 ns Setup Time (Stop Condition) t8 600 ns Data Hold Time t9 900 ns Pulse width of spikes that will be suppressed tps 0 5 ns Note: Device Address = 0x94. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
New Zealand ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
