HMC833LP6GE datasheet(21/61 Pages) HITTITE

21 / 61 page

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HMC833LP6GE

v01.1012

FRACTIONAL-N PLL WITH INTEGRATED VCO

25 - 6000 MHz

enables of the VCO subsystem, it has no affect on the PLL or VCO subsystem because typically and

by default the VCO subsystem is operating in auto mode.

Then to mute the PLL output simply write VCO_Reg 03h [2] = 1 (accomplish by writing to PLL Reg 05h

= 2A18h in doubler mode, and Reg 05h = 2A98h in fundamental mode of the VCO), which effectively

places the VCO subsystem in manual mode. Manual mode enables have been pre-configured in step

1 to mute the PLL output.

If it is required to tune the HMC833LP6GE while the output is muted a final write, Reg 05h = 0h, is

required.

To enable the HMC833LP6GE output after muting:

Write VCO_Reg 03h [2] = 0 (accomplish by writing to PLL Reg 05h = 2818h in doubler mode, or Reg

05h = 2898h in fundamental mode).

A final write to Reg 05h = 0h is required.

Please refer to Figure 27 for more information. Also note that the VCO subsystem registers are not directly

accessible. They are written to the VCO subsystem via PLL Reg 05h. More information about VCO

subsystem SPI in section 1.19.

1.3

VCO Built in Test with AutoCal

The frequency limits of the VCO can be measured using the BIST features of the AutoCal machine.

This is done by setting Reg 0Ah[10]=1 which freezes the VCO switches in one position. VCO switches may

then be written manually, with the varactor biased at the nominal mid-rail voltage used for AutoCal. For

example to measure the VCO maximum frequency use switch 0, written to the VCO subsystem via Reg

05h=[000000000 0000 VCOID]. Where VCOID = ‘000’b.

If AutoCal is enabled, (Reg 0Ah[11] = 0), and a new frequency is written, AutoCal will run, but with switches

frozen. The VCO frequency error relative to the command frequency will be measured and results written

to Reg 11h[19:0] where Reg 11h[19] is the sign bit. The result will be written in terms of VCO count error

(EQ 4). For example if the expected VCO is 2 GHz, reference is 50 MHz, and n is 6, we expect to measure

2560 counts. If we measure a difference of -5 counts in Reg 11h, then it means we actually measured 2555

counts. Hence the actual frequency of the VCO is 5/2560 low, or 1.99609375 GHz, ±1 Count ~ ±781 kHz.

1.4

Spurious Performance

1.4.1

Integer Operation and Reference Spurious

The VCO always operates at an integer multiple of the PD frequency in an integer synthesizer. In general,

spurious signals originating from an integer synthesizer can only occur at multiples of the PD frequency.

These unwanted outputs closest to the carrier are often simply referred to as reference sidebands.

Unwanted reference harmonics can also exist far from the carrier due to circuit isolation.

Spurs unrelated to the reference frequency must originate from outside sources. External spurious sources

can modulate the VCO indirectly through power supplies, ground, or output ports, or bypass the loop filter

due to poor isolation of the filter. It can also simply add to the output of the PLL.

Reference spurious levels are typically below -100 dBc with a well designed board layout. A regulator with

low noise and high power supply rejection, such as the HMC1060LP3E, is recommended to minimize

external spurious sources.

Reference spurious levels of below -100 dBc require superb board isolation of power supplies, isolation of

the VCO from the digital switching of the synthesizer and isolation of the VCO load from the synthesizer.

Typical board layout, regulator design, eval boards and application information are available for very low

spurious operation. Operation with lower levels of isolation in the application circuit board, from those rec-

ommended by Hittite, can result in higher spurious levels.

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