PIC16F1459-ESSQTP datasheet(319/418 Pages) MICROCHIP

319 / 418 page

 2012 Microchip Technology Inc.

Preliminary

DS41639A-page 319

PIC16(L)F1454/5/9

26.5.1

USB INTERRUPT STATUS (UIR)

The USB Interrupt Status register (Register 26-7) con-

tains the flag bits for each of the USB Status interrupt

sources. Each of these sources has a corresponding

interrupt enable bit in the UIE register. All of the USB

status flags are ORed together to generate the USBIF

interrupt flag for the microcontroller's interrupt funnel.

Once an interrupt bit has been set by the SIE, it must

be cleared by software. The flag bits can also be set in

software which can aid in firmware debugging.

26.5.1.1

Bus Activity Detect Interrupt Bit

(ACTVIF)

The ACTVIF bit cannot be cleared immediately after the

USB module wakes up from Suspend or while the USB

module is suspended. A few clock cycles are required to

synchronize the internal hardware state machine before

the ACTVIF bit can be cleared by firmware. Clearing the

ACTVIF bit in firmware before the internal hardware is

synchronized may not have an effect on the value of

ACTVIF. The USB module may not be immediately oper-

ational after clearing the SUSPND bit if using the 48 MHz

PLL source because the PLL will require time to lock.

The application code should clear the ACTVIF flag as

shown in Example 26-1.

Only one ACTVIF interrupt is generated when resum-

ing from the USB bus Idle condition. If user firmware

clears the ACTVIF bit, even when there is continuous

bus traffic, the bit will not become set again until after a

IDLEIF condition occurs. Bus traffic must cease long

enough to generate another IDLEIF condition before

another ACTVIF interrupt can be generated.

EXAMPLE 26-1:

CLEARING ACTVIF BIT

(UIR<2>)

26.5.2

USB INTERRUPT ENABLE

The USB Interrupt Enable register (Register 26-8) con-

tains the enable bits for the USB Status interrupt

sources. Setting any of these bits will enable the

respective interrupt source in the UIR register.

The values in this register only affect the propagation of

an interrupt condition to the microcontroller's interrupt

logic. The flag bits are set by their interrupt conditions,

allowing them to be polled and serviced without actu-

ally generating an interrupt.

26.5.3

USB ERROR INTERRUPT STATUS

The USB Error Interrupt Status register (Register 26-9)

contains the flag bits for each of the error sources

within the USB peripheral. Each of these sources is

enabled by a corresponding bit in the UEIE register. All

of the USB error flags are ORed together to generate

the USB Error Interrupt Flag (UERRIF) at the top level

of the interrupt logic.

Each error bit is set as soon as the error condition is

detected. Thus, the interrupt will typically not corre-

spond with the end of a token being processed.

Once an interrupt bit has been set by the SIE, it must

be cleared by software.

26.5.4

USB INTERRUPT (UEIE) ENABLE

The USB Error Interrupt Enable register (Register 26-10)

contains the enable bits for each of the USB error inter-

rupt sources. Setting any of these bits will enable the

respective error interrupt source in the UEIR register. If

enabled, the UERRIF bit of the UIR register will be set

when any USB error interrupt is set.

As with the UIE register, the enable bits only affect the

propagation

interrupt

condition

the

microcontroller's interrupt logic. The flag bits are set by

their interrupt conditions, allowing them to be polled

and serviced without actually generating an interrupt.

Note:

All status flags in the UIR register should

be resolved and cleared before the USBIF

bit is cleared.

Assembly:

BCF

UCON, SUSPND

LOOP:

BTFSS

UIR, ACTVIF

BRA

DONE

BCF

UIR, ACTVIF

BRA

LOOP

DONE:

UCONbits.SUSPND = 0;

while (UIRbits.ACTVIF) { UIRbits.ACTVIF = 0; }

Note:

All status flags in the UEIR register should

be resolved and cleared before the

UERRIF bit is cleared.

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