| Electronic Components Datasheet Search |
|
PIC16F1459-ESOSQTP Datasheet(PDF) 66 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
PIC16F1459-ESOSQTP Datasheet(HTML) 66 Page - Microchip Technology |
|
66 / 418 page ![]() PIC16(L)F1454/5/9 DS41639A-page 66 Preliminary 2012 Microchip Technology Inc. 5.3 CPU Clock Divider The CPU Clock divider allows the system clock to run at a slower speed than the Low/Full-Speed USB module clock, while sharing the same clock source. Only the oscillator defined by the settings of the FOSC bits of the Configuration Words may be used with the CPU clock divider. the CPU clock divider is controlled by the CPUDIV<1:0> bits of the Configuration Words. Setting the CPUDIV bits will set the system clock to: • Equal the clock speed of the USB module • Half the clock speed of the USB module • One third the clock speed of the USB Module • One sixth clock speed of the USB module For more information on the CPU Clock Divider, see Figure 5-1 and Configuration Words. 5.4 USB Operation The USB module is designed to operate in two different modes: • Low Speed • Full Speed To achieve the timing requirements imposed by the USB specifications, the internal oscillator or the primary external oscillator are required for the USB module. The FOSC bits of the Configuration Words must be set to INTOSC, ECH or HS mode with a clock frequency of 6, 12, or 16 MHz. 5.4.1 LOW-SPEED OPERATION For low-speed USB Operation, a 24 MHz clock is required for the USB module. To generate the 24 MHz clock, the following Oscillator modes are allowed: • HFINTOSC with PLL • ECH mode •HS mode Table 5-1 shows the recommended Clock mode for low-speed operation. 5.4.2 HIGH-SPEED OPERATION For full-speed USB operation, a 48 MHz clock is required for the USB module. To generate the 48 MHz clock, the following oscillator modes are allowed: • HFINTOSC with PLL • ECH mode •HS mode Table 5-1 shows the recommended Clock mode for full-speed operation. TABLE 5-1: LOW-SPEED USB CLOCK SETTINGS Clock Mode Clock Frequency PLL Value USBLSCLK CPUDIV<1:0> System Clock Frequency (MHz) HFINTOSC 16 MHz 3x 1 11 10 01 00 8 16 24 48 8 MHz 3x 0 11 10 01 00 4 8 12 24 ECH or HS mode 16 MHz 3x 1 11 10 01 00 8 16 24 48 12 MHz 4x 1 11 10 01 00 8 16 24 48 8 MHz 3x 0 11 10 01 00 4 8 12 24 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |