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AM79C972BVCW Datasheet(PDF) 63 Page - Advanced Micro Devices |
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AM79C972BVCW Datasheet(HTML) 63 Page - Advanced Micro Devices |
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63 / 130 page ![]() Am79C972 63 byte ordering is such that the first byte received from the network (after the SFD) must match the least signif- icant byte of CSR12 (PADR[7:0]), and the sixth byte re- ceived must match the most significant byte of CSR14 (PADR[47:40]). When DRCVPA (CSR15, bit 13) is set to 1, the Am79C972 controller will not accept unicast frames. If the incoming frame is multicast, the Am79C972 con- troller performs a calculation on the contents of the destination address field to determine whether or not to accept the frame. This calculation is explained in the section that describes the Logical Address Filter (LADRF). When all bits of the LADRF registers are 0, no multicast frames are accepted, except for broadcast frames. Although broadcast frames are classified as special multicast frames, they are treated differently by the Am79C972 controller hardware. Broadcast frames are always accepted, except when DRCVBC (CSR15, bit 14) is set and there is no Logical Address match. None of the address filtering described above applies when the Am79C972 controller is operating in the pro- miscuous mode. In the promiscuous mode, all properly formed packets are received, regardless of the con- tents of their destination address fields. The promiscu- ous mode overrides the Disable Receive Broadcast bit (DRCVBC bit l4 in the MODE register) and the Disable Receive Physical Address bit (DRCVPA, CSR15, bit 13). The Am79C972 controller operates in promiscuous mode when PROM (CSR15, bit 15) is set. In addition, the Am79C972 controller provides the Ex- ternal Address Detection Interface (EADI) to allow ex- ternal address filtering. See the section External Address Detection Interface for further detail. The receive descriptor entry RMD1 contains three bits that indicate which method of address matching caused the Am79C972 controller to accept the frame. Note that these indicator bits are only available when the Am79C972 controller is programmed to use 32-bit structures for the descriptor entries (BCR20, bit 7-0, SWSTYLE is set to 2 or 3). PAM (RMD1, bit 22) is set by the Am79C972 controller when it accepted the received frame due to a match of the frame’s destination address with the content of the physical address register. LAFM (RMD1, bit 21) is set by the Am79C972 control- ler when it accepted the received frame based on the value in the logical address filter register. BAM (RMD1, bit 20) is set by the Am79C972 controller when it accepted the received frame because the frame’s destination address is of the type ’Broadcast’. If DRCVBC (CSR15, bit 14) is cleared to 0, only BAM, but not LAFM will be set when a Broadcast frame is re- ceived, even if the Logical Address Filter is pro- grammed in such a way that a Broadcast frame would pass the hash filter. If DRCVBC is set to 1 and the Log- ical Address Filter is programmed in such a way that a Broadcast frame would pass the hash filter, LAFM will be set on the reception of a Broadcast frame. When the Am79C972 controller operates in promiscu- ous mode and none of the three match bits is set, it is an indication that the Am79C972 controller only ac- cepted the frame because it was in promiscuous mode. When the Am79C972 controller is not programmed to be in promiscuous mode, but the EADI interface is en- abled, then when none of the three match bits is set, it is an indication that the Am79C972 controller only ac- cepted the frame because it was not rejected by driving the EAR pin LOW within 64 bytes after SFD. See Table 6 for receive address matches. Table 6. Receive Address Match Automatic Pad Stripping During reception of an IEEE 802.3 frame, the pad field can be stripped automatically. Setting ASTRP_RCV (CSR4, bit 0) to 1 enables the automatic pad stripping feature. The pad field will be stripped before the frame is passed to the FIFO, thus preserving FIFO space for additional frames. The FCS field will also be stripped, since it is computed at the transmitting station based on the data and pad field characters, and will be invalid for a receive frame that has had the pad characters stripped. The number of bytes to be stripped is calculated from the embedded length field (as defined in the ISO 8802- 3 (IEEE/ANSI 802.3) definition) contained in the frame. The length indicates the actual number of LLC data bytes contained in the message. Any received frame which contains a length field less than 46 bytes will have the pad field stripped (if ASTRP_RCV is set). Receive PAM LAF MBAM DRC VBC Comment 00 0 X Frame accepted due to PROM = 1 or no EADI reject 1 0 0 X Physical address match 01 00 Logical address filter match; frame is not of type broadcast 01 01 Logical address filter match; frame can be of type broadcast 00 10 Broadcast frame |
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