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AM79C972BVCW Datasheet(PDF) 95 Page - Advanced Micro Devices |
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AM79C972BVCW Datasheet(HTML) 95 Page - Advanced Micro Devices |
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95 / 130 page ![]() Am79C972 95 USER ACCESSIBLE REGISTERS The Am79C972 controller has three types of user reg- isters: the PCI configuration registers, the Control and Status registers (CSR), and the Bus Control registers (BCR). The Am79C972 controller implements all PCnet-ISA (Am79C960) registers, all C-LANCE (Am79C90) regis- ters, plus a number of additional registers. The Am79C972 CSRs are compatible upon power up with both the PCnet-ISA CSRs and all of the C-LANCE CSRs. The PCI configuration registers can be accessed in any data width. All other registers must be accessed ac- cording to the I/O mode that is currently selected. When WIO mode is selected, all other register loca- tions are defined to be 16 bits in width. When DWIO mode is selected, all these register locations are de- fined to be 32 bits in width, with the upper 16 bits of most register locations marked as reserved locations with undefined values. When performing register write operations in DWIO mode, the upper 16 bits should al- ways be written as zeros. When performing register read operations in DWIO mode, the upper 16 bits of I/O resources should always be regarded as having un- defined values, except for CSR88. The Am79C972 registers can be divided into four groups: PCI Configuration, Setup, Running, and Test. Registers not included in any of these categories can be assumed to be intended for diagnostic purposes. n PCI Configuration Registers These registers are intended to be initialized by the system initialization procedure (e.g., BIOS device ini- tialization routine) to program the operation of the Am79C972 controller PCI bus interface. The following is a list of the registers that would typi- cally need to be programmed once during the initializa- tion of the Am79C972 controller within a system: — PCI I/O Base Address or Memory Mapped I/O Base Address register — PCI Expansion ROM Base Address register — PCI Interrupt Line register — PCI Latency Timer register — PCI Status register — PCI Command register — OnNow register n Setup Registers These registers are intended to be initialized by the de- vice driver to program the operation of various Am79C972 controller features. The following is a list of the registers that would typi- cally need to be programmed once during the setup of the Am79C972 controller within a system. The control bits in each of these registers typically do not need to be modified once they have been written. However, there are no restrictions as to how many times these registers may actually be accessed. Note that if the de- fault power up values of any of these registers is ac- ceptable to the application, then such registers need never be accessed at all. Note: Registers marked with “^” may be programma- ble through the EEPROM read operation and, there- fore, do not necessarily need to be written to by the system initialization procedure or by the driver soft- ware. Registers marked with “*” will be initialized by the initialization block read operation. CSR1 Initialization Block Address[15:0] CSR2* Initialization Block Address[31:16] CSR3 Interrupt Masks and Deferral Control CSR4 Test and Features Control CSR5 Extended Control and Interrupt CSR7 Extended Control and Interrupt2 CSR8* Logical Address Filter[15:0] CSR9* Logical Address Filter[31:16] CSR10* Logical Address Filter[47:32] CSR11* Logical Address Filter[63:48] CSR12*^ Physical Address[15:0] CSR13*^ Physical Address[31:16] CSR14*^ Physical Address[47:32] CSR15* Mode CSR24* Base Address of Receive Ring Lower CSR25* Base Address of Receive Ring Upper CSR30* Base Address of Transmit Ring Lower CSR31* Base Address of Transmit Ring Upper CSR47* Transmit Polling Interval CSR49* Receive Polling Interval CSR76* Receive Ring Length CSR78* Transmit Ring Length CSR80 DMA Transfer Counter and FIFO Thresh- old Control CSR82 Bus Activity Timer CSR100 Memory Error Timeout CSR116^ OnNow Miscellaneous CSR122 Receiver Packet Alignment Control |
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