PIC18F4550ESOSQTP datasheet(171/430 Pages) MICROCHIP

171 / 430 page

Preliminary

DS39632D-page 169

PIC18F2455/2550/4455/4550

17.2.4

USB ENDPOINT CONTROL

Each of the 16 possible bidirectional endpoints has its

own independent control register, UEPn (where ‘n’ rep-

resents the endpoint number). Each register has an

identical complement of control bits. The prototype is

shown in Register 17-4.

The EPHSHK bit (UEPn<4>) controls handshaking for

the endpoint; setting this bit enables USB handshaking.

Typically, this bit is always set except when using

isochronous endpoints.

The EPCONDIS bit (UEPn<3>) is used to enable or

disable USB control operations (SETUP) through the

endpoint. Clearing this bit enables SETUP transac-

tions. Note that the corresponding EPINEN and

EPOUTEN bits must be set to enable IN and OUT

transactions. For Endpoint 0, this bit should always be

cleared

since

the

USB

specifications

identify

Endpoint 0 as the default control endpoint.

The EPOUTEN bit (UEPn<2>) is used to enable or dis-

able USB OUT transactions from the host. Setting this

bit enables OUT transactions. Similarly, the EPINEN bit

(UEPn<1>) enables or disables USB IN transactions

from the host.

The EPSTALL bit (UEPn<0>) is used to indicate a

STALL condition for the endpoint. If a STALL is issued

on a particular endpoint, the EPSTALL bit for that end-

point pair will be set by the SIE. This bit remains set

until it is cleared through firmware, or until the SIE is

reset.

UEPn: USB ENDPOINT n CONTROL REGISTER (UEP0 THROUGH UEP15)

U-0

R/W-0

—

EPHSHK

EPCONDIS

EPOUTEN

EPINEN

EPSTALL(1)

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-5

Unimplemented: Read as ‘0’

bit 4

EPHSHK: Endpoint Handshake Enable bit

= Endpoint handshake enabled

= Endpoint handshake disabled (typically used for isochronous endpoints)

bit 3

EPCONDIS: Bidirectional Endpoint Control bit

If EPOUTEN = 1 and EPINEN = 1:

= Disable Endpoint n from control transfers; only IN and OUT transfers allowed

= Enable Endpoint n for control (SETUP) transfers; IN and OUT transfers also allowed

bit 2

EPOUTEN: Endpoint Output Enable bit

= Endpoint n output enabled

= Endpoint n output disabled

bit 1

EPINEN: Endpoint Input Enable bit

= Endpoint n input enabled

= Endpoint n input disabled

bit 0

EPSTALL: Endpoint Stall Enable bit(1)

= Endpoint n is stalled

= Endpoint n is not stalled

Note 1:

Valid only if Endpoint n is enabled; otherwise, the bit is ignored.

PIC18F4550ESOSQTP Datasheet(PDF) 171 Page - Microchip Technology

PIC18F4550ESOSQTP Datasheet(HTML) 171 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL