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PIC18F4550ESOSQTP Datasheet(PDF) 172 Page - Microchip Technology

Part # PIC18F4550ESOSQTP
Description  28/40/44-Pin, High-Performance, Enhanced Flash, USB Microcontrollers with nanoWatt Technology
PDF  430 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F4550ESOSQTP Datasheet(HTML) 172 Page - Microchip Technology

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PIC18F2455/2550/4455/4550
DS39632D-page 170
Preliminary
© 2007 Microchip Technology Inc.
17.2.5
USB ADDRESS REGISTER
(UADDR)
The USB Address register contains the unique USB
address that the peripheral will decode when active.
UADDR is reset to 00h when a USB Reset is received,
indicated by URSTIF, or when a Reset is received from
the microcontroller. The USB address must be written
by the microcontroller during the USB setup phase
(enumeration) as part of the Microchip USB firmware
support.
17.2.6
USB FRAME NUMBER REGISTERS
(UFRMH:UFRML)
The Frame Number registers contain the 11-bit frame
number. The low-order byte is contained in UFRML,
while the three high-order bits are contained in
UFRMH. The register pair is updated with the current
frame number whenever a SOF token is received. For
the microcontroller, these registers are read-only. The
Frame
Number
register
is
primarily
used
for
isochronous transfers.
17.3
USB RAM
USB data moves between the microcontroller core and
the SIE through a memory space known as the USB
RAM. This is a special dual port memory that is
mapped into the normal data memory space in Banks 4
through 7 (400h to 7FFh) for a total of 1 Kbyte
(Figure 17-5).
Bank 4 (400h through 4FFh) is used specifically for
endpoint buffer control, while Banks 5 through 7 are
available for USB data. Depending on the type of
buffering being used, all but 8 bytes of Bank 4 may also
be available for use as USB buffer space.
Although USB RAM is available to the microcontroller
as data memory, the sections that are being accessed
by
the
SIE
should
not
be
accessed
by
the
microcontroller. A semaphore mechanism is used to
determine the access to a particular buffer at any given
time. This is discussed in Section 17.4.1.1 “Buffer
Ownership”.
FIGURE 17-5:
IMPLEMENTATION OF
USB RAM IN DATA
MEMORY SPACE
400h
4FFh
7FFh
500h
USB Data or
Buffer Descriptors,
USB Data or User Data
User Data
User Data
Unused
SFRs
3FFh
000h
F60h
FFFh
Banks 0
Banks 4
Bank15
(USB RAM)
F00h
Banks 8
800h
to 14
to 3
to 7



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