CS44L10

DS541PP1

23

4.10 Mode Control 3 (address 0Bh)

4.10.1 DIGITAL INTERFACE FORMATS (DIF)

Default = 00

01 - Right Justified, 16 bit

10 - Left Justified

11 - Right Justified, 24 bit

Function:

The required relationship between the Left/Right clock, serial clock and serial data is defined by the Digital

Interface Format and the options are detailed in figures 16 through 19.

4.10.2 CHANNEL A VOLUME = CHANNEL B VOLUME (A=B)

Default = 0

0 - Disabled

1 - Enabled

Function:

The HP_A and HP_B volume levels are independently controlled by the A and the B Channel Volume

Control Bytes when this function is disabled. The volume on both HP_A and HP_B are determined by the

A Channel Volume Control Byte and the B Channel Byte is ignored when this function is enabled.

76543

210

DIF1

DIF0

A=B

VCBYP

CP_EN

FREEZE

HPSEN

Reserved

00000

000

Gain

dB

-10dB

0dB

Frequency

T2 = 15 µs

T1=50 µs

F1

F2

3.183 kHz

10.61 kHz

Figure 6. De-Emphasis Curve