LPC1547JBD48 datasheet(48/99 Pages) NXP

48 / 99 page

LPC15XX

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Product data sheet

Rev. 1 — 19 February 2014

48 of 99

NXP Semiconductors

LPC15xx

32-bit ARM Cortex-M3 microcontroller

8.40.3 Deep-sleep mode

In Deep-sleep mode, the LPC15xx is in Sleep-mode and all peripheral clocks and all clock

sources are off except for the IRC. The IRC output is disabled unless the IRC is selected

as input to the watchdog timer. In addition all analog blocks are shut down and the flash is

in stand-by mode. In Deep-sleep mode, the application can keep the watchdog oscillator

and the BOD circuit running for self-timed wake-up and BOD protection.

The LPC15xx can wake up from Deep-sleep mode via reset, selected GPIO pins, a

watchdog timer interrupt, an interrupt generating USB port activity, an RTC interrupt, or

any interrupts that the USART, SPI, or I2C interfaces can create in Deep-sleep mode. The

USART wake-up requires the 32 kHz mode, the synchronous mode, or the CTS interrupt

to be set up.

Deep-sleep mode saves power and allows for short wake-up times.

8.40.4 Power-down mode

In Power-down mode, the LPC15xx is in Sleep-mode and all peripheral clocks and all

clock sources are off except for watchdog oscillator if selected. In addition all analog

blocks and the flash are shut down. In Power-down mode, the application can keep the

BOD circuit running for BOD protection.

The LPC15xx can wake up from Power-down mode via reset, selected GPIO pins, a

watchdog timer interrupt, an interrupt generating USB port activity, an RTC interrupt, or

any interrupts that the USART, SPI, or I2C interfaces can create in Power-down mode.

The USART wake-up requires the 32 kHz mode, the synchronous mode, or the CTS

interrupt to be set up.

Power-down mode reduces power consumption compared to Deep-sleep mode at the

expense of longer wake-up times.

8.40.5 Deep power-down mode

In Deep power-down mode, power is shut off to the entire chip except for the WAKEUP

pin and the always-on RTC power-domain. The LPC15xx can wake up from Deep

power-down mode via the WAKEUP pin or a wake-up signal generated by the RTC

interrupt.

The LPC15xx can be blocked from entering Deep power-down mode by setting a lock bit

in the PMU block. Blocking the Deep power-down mode enables the application to keep

the watchdog timer or the BOD running at all times.

If the WAKEUP pin is used in the application, an external pull-up resistor is required on

the WAKEUP pin to hold it HIGH while the part is in deep power-down mode. Pulling the

WAKEUP pin LOW wakes up the part from deep power-down mode. In addition, pull the

RESET pin HIGH to prevent it from floating while in Deep power-down mode.

LPC1547JBD48 Datasheet(PDF) 48 Page - NXP Semiconductors

LPC1547JBD48 Datasheet(HTML) 48 Page - NXP Semiconductors

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